repos/blastem: vdp.c annotate

annotate vdp.c @ 2700:1cfd000dc750 default tip

WIP display screen border in plane debugger

author	Michael Pavone <pavone@retrodev.com>
date	Sun, 29 Jun 2025 23:38:56 -0700
parents	46dba737b931
children

rev	line source
467 140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 462 diff changeset	1 /*
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 462 diff changeset	2 Copyright 2013 Michael Pavone
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	3 This file is part of BlastEm.
467 140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 462 diff changeset	4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text.
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 462 diff changeset	5 */
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	6 #include "vdp.h"
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	7 #include "blastem.h"
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	8 #include <stdlib.h>
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	9 #include <string.h>
426 add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	10 #include "render.h"
991 f9ee6f746cb4 Properly emulate machine freeze when reading from VDP while configured for writes Michael Pavone <pavone@retrodev.com> parents: 984 diff changeset	11 #include "util.h"
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	12 #include "event_log.h"
2009 4ace0fef6f8f Add support for the parts of the KMod debug ports used by SGDK Mike Pavone <pavone@retrodev.com> parents: 1998 diff changeset	13 #include "terminal.h"
2693 46dba737b931 WIP Nuklear UI in VDP debug windows Michael Pavone <pavone@retrodev.com> parents: 2686 diff changeset	14 #ifndef DISABLE_NUKLEAR
46dba737b931 WIP Nuklear UI in VDP debug windows Michael Pavone <pavone@retrodev.com> parents: 2686 diff changeset	15 #include "nuklear_ui/debug_ui.h"
46dba737b931 WIP Nuklear UI in VDP debug windows Michael Pavone <pavone@retrodev.com> parents: 2686 diff changeset	16 #endif
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	17
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	18 #define NTSC_INACTIVE_START 224
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	19 #define PAL_INACTIVE_START 240
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	20 #define MODE4_INACTIVE_START 192
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	21 #define BUF_BIT_PRIORITY 0x40
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	22 #define MAP_BIT_PRIORITY 0x8000
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	23 #define MAP_BIT_H_FLIP 0x800
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	24 #define MAP_BIT_V_FLIP 0x1000
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	25
436 e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	26 #define SCROLL_BUFFER_MASK (SCROLL_BUFFER_SIZE-1)
e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	27 #define SCROLL_BUFFER_DRAW (SCROLL_BUFFER_SIZE/2)
39 3c69319269ef Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should Mike Pavone <pavone@retrodev.com> parents: 38 diff changeset	28
328 bf7ed23efa40 Fewer magic numbers in the VDP core for the win Mike Pavone <pavone@retrodev.com> parents: 327 diff changeset	29 #define MCLKS_SLOT_H40 16
bf7ed23efa40 Fewer magic numbers in the VDP core for the win Mike Pavone <pavone@retrodev.com> parents: 327 diff changeset	30 #define MCLKS_SLOT_H32 20
1174 500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	31 #define VINT_SLOT_H40 0 //21 slots before HSYNC, 16 during, 10 after
500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	32 #define VINT_SLOT_H32 0 //old value was 23, but recent tests suggest the actual value is close to the H40 one
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	33 #define VINT_SLOT_MODE4 4
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	34 #define HSYNC_SLOT_H40 230
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 680 diff changeset	35 #define HSYNC_END_H40 (HSYNC_SLOT_H40+17)
647 5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	36 #define HBLANK_START_H40 178 //should be 179 according to Nemesis, but 178 seems to fit slightly better with my test ROM results
5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	37 #define HBLANK_END_H40 0 //should be 5.5 according to Nemesis, but 0 seems to fit better with my test ROM results
5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	38 #define HBLANK_START_H32 233 //should be 147 according to Nemesis which is very different from my test ROM result
5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	39 #define HBLANK_END_H32 0 //should be 5 according to Nemesis, but 0 seems to fit better with my test ROM results
5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	40 #define LINE_CHANGE_H40 165
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	41 #define LINE_CHANGE_H32 133
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	42 #define LINE_CHANGE_MODE4 248
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	43 #define VBLANK_START_H40 (LINE_CHANGE_H40+2)
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	44 #define VBLANK_START_H32 (LINE_CHANGE_H32+2)
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	45 #define FIFO_LATENCY 3
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	46 #define READ_LATENCY 3
328 bf7ed23efa40 Fewer magic numbers in the VDP core for the win Mike Pavone <pavone@retrodev.com> parents: 327 diff changeset	47
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	48 #define BORDER_TOP_V24 27
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	49 #define BORDER_TOP_V28 11
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	50 #define BORDER_TOP_V24_PAL 54
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	51 #define BORDER_TOP_V28_PAL 38
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	52 #define BORDER_TOP_V30_PAL 30
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	53
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	54 #define BORDER_BOT_V24 24
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	55 #define BORDER_BOT_V28 8
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	56 #define BORDER_BOT_V24_PAL 48
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	57 #define BORDER_BOT_V28_PAL 32
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	58 #define BORDER_BOT_V30_PAL 24
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	59
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	60 enum {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	61 INACTIVE = 0,
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	62 PREPARING, //used for line 0x1FF
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	63 ACTIVE
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	64 };
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	65
2411 efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	66 uint16_t mode4_address_map[0x4000];
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	67 static uint32_t planar_to_chunky[256];
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	68 static uint8_t levels[] = {0, 27, 49, 71, 87, 103, 119, 130, 146, 157, 174, 190, 206, 228, 255};
426 add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	69
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	70 static uint8_t debug_base[][3] = {
437 afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	71 {127, 127, 127}, //BG
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	72 {0, 0, 127}, //A
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	73 {127, 0, 0}, //Window
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	74 {0, 127, 0}, //B
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	75 {127, 0, 127} //Sprites
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	76 };
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	77
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	78 static uint32_t calc_crop(uint32_t crop, uint32_t border)
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	79 {
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	80 return crop >= border ? 0 : border - crop;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	81 }
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	82
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	83 static void update_video_params(vdp_context *context)
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	84 {
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	85 uint32_t top_crop = render_overscan_top();
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	86 uint32_t bot_crop = render_overscan_bot();
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	87 uint32_t border_top;
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	88 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	89 if (context->regs[REG_MODE_2] & BIT_PAL) {
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	90 if (context->flags2 & FLAG2_REGION_PAL) {
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	91 context->inactive_start = PAL_INACTIVE_START;
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	92 border_top = BORDER_TOP_V30_PAL;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	93 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V30_PAL);
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	94 } else {
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	95 //the behavior here is rather weird and needs more investigation
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	96 context->inactive_start = 0xF0;
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	97 border_top = 1;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	98 context->border_bot = calc_crop(bot_crop, 3);
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	99 }
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	100 } else {
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	101 context->inactive_start = NTSC_INACTIVE_START;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	102 if (context->flags2 & FLAG2_REGION_PAL) {
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	103 border_top = BORDER_TOP_V28_PAL;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	104 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V28_PAL);
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	105 } else {
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	106 border_top = BORDER_TOP_V28;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	107 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V28);
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	108 }
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	109 }
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	110 if (context->regs[REG_MODE_4] & BIT_H40) {
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	111 context->max_sprites_frame = MAX_SPRITES_FRAME;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	112 context->max_sprites_line = MAX_SPRITES_LINE;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	113 } else {
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	114 context->max_sprites_frame = MAX_SPRITES_FRAME_H32;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	115 context->max_sprites_line = MAX_SPRITES_LINE_H32;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	116 }
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	117 if (context->state == INACTIVE) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	118 //Undo forced INACTIVE state due to neither Mode 4 nor Mode 5 being active
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	119 if (context->vcounter < context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	120 context->state = ACTIVE;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	121 } else if (context->vcounter == 0x1FF) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	122 context->state = PREPARING;
2567 8872c8e3e0fc Fix minor regression in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 2566 diff changeset	123 if (!context->done_composite) {
8872c8e3e0fc Fix minor regression in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 2566 diff changeset	124 memset(context->compositebuf, 0, sizeof(context->compositebuf));
8872c8e3e0fc Fix minor regression in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 2566 diff changeset	125 }
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	126 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	127 }
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	128 } else {
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	129 context->inactive_start = MODE4_INACTIVE_START;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	130 if (context->flags2 & FLAG2_REGION_PAL) {
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	131 border_top = BORDER_TOP_V24_PAL;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	132 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V24_PAL);
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	133 } else {
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	134 border_top = BORDER_TOP_V24;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	135 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V24);
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	136 }
2260 3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	137 if (!(context->regs[REG_MODE_1] & BIT_MODE_4) && context->type == VDP_GENESIS){
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	138 context->state = INACTIVE;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	139 } else if (context->state == INACTIVE) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	140 //Undo forced INACTIVE state due to neither Mode 4 nor Mode 5 being active
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	141 if (context->vcounter < context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	142 context->state = ACTIVE;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	143 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	144 else if (context->vcounter == 0x1FF) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	145 context->state = PREPARING;
2567 8872c8e3e0fc Fix minor regression in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 2566 diff changeset	146 if (!context->done_composite) {
8872c8e3e0fc Fix minor regression in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 2566 diff changeset	147 memset(context->compositebuf, 0, sizeof(context->compositebuf));
8872c8e3e0fc Fix minor regression in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 2566 diff changeset	148 }
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	149 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	150 }
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	151 }
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	152 context->border_top = calc_crop(top_crop, border_top);
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	153 context->top_offset = border_top - context->border_top;
2385 ce9f5a42c481 Ensure VDP double_res flag is updated when loading a save state Michael Pavone <pavone@retrodev.com> parents: 2381 diff changeset	154 context->double_res = (context->regs[REG_MODE_4] & (BIT_INTERLACE \| BIT_DOUBLE_RES)) == (BIT_INTERLACE \| BIT_DOUBLE_RES);
ce9f5a42c481 Ensure VDP double_res flag is updated when loading a save state Michael Pavone <pavone@retrodev.com> parents: 2381 diff changeset	155 if (!context->double_res) {
ce9f5a42c481 Ensure VDP double_res flag is updated when loading a save state Michael Pavone <pavone@retrodev.com> parents: 2381 diff changeset	156 context->flags2 &= ~FLAG2_EVEN_FIELD;
ce9f5a42c481 Ensure VDP double_res flag is updated when loading a save state Michael Pavone <pavone@retrodev.com> parents: 2381 diff changeset	157 }
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	158 }
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	159
2236 c149c929361c Fix color bug when switching between Game Gear and other Sega systems Michael Pavone <pavone@retrodev.com> parents: 2230 diff changeset	160 static uint8_t static_table_init_done;
426 add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	161
2686 05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	162 vdp_context *init_vdp_context_int(uint8_t region_pal, uint8_t has_max_vsram, uint8_t type)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	163 {
1640 3602f3b20072 Small cleanup of vdp_context struct layout and removal of separately allocated buffers Michael Pavone <pavone@retrodev.com> parents: 1639 diff changeset	164 vdp_context *context = calloc(1, sizeof(vdp_context) + VRAM_SIZE);
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	165 context->sprite_draws = MAX_SPRITES_LINE;
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	166 context->fifo_write = 0;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	167 context->fifo_read = -1;
995 2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	168 context->regs[REG_HINT] = context->hint_counter = 0xFF;
1906 2d462aa78349 Make VDP VSRAM capacity respect model selection Michael Pavone <pavone@retrodev.com> parents: 1899 diff changeset	169 context->vsram_size = has_max_vsram ? MAX_VSRAM_SIZE : MIN_VSRAM_SIZE;
2194 01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	170 context->type = type;
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	171 uint8_t b,g,r,index;
2236 c149c929361c Fix color bug when switching between Game Gear and other Sega systems Michael Pavone <pavone@retrodev.com> parents: 2230 diff changeset	172 for (uint16_t color = 0; color < (1 << 12); color++) {
c149c929361c Fix color bug when switching between Game Gear and other Sega systems Michael Pavone <pavone@retrodev.com> parents: 2230 diff changeset	173 if (type == VDP_GAMEGEAR) {
c149c929361c Fix color bug when switching between Game Gear and other Sega systems Michael Pavone <pavone@retrodev.com> parents: 2230 diff changeset	174 b = (color >> 8 & 0xF) * 0x11;
c149c929361c Fix color bug when switching between Game Gear and other Sega systems Michael Pavone <pavone@retrodev.com> parents: 2230 diff changeset	175 g = (color >> 4 & 0xF) * 0x11;
c149c929361c Fix color bug when switching between Game Gear and other Sega systems Michael Pavone <pavone@retrodev.com> parents: 2230 diff changeset	176 r = (color & 0xF) * 0x11;
c149c929361c Fix color bug when switching between Game Gear and other Sega systems Michael Pavone <pavone@retrodev.com> parents: 2230 diff changeset	177 } else {
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	178 switch (color & FBUF_MASK)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	179 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	180 case FBUF_SHADOW:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	181 b = levels[(color >> 9) & 0x7];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	182 g = levels[(color >> 5) & 0x7];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	183 r = levels[(color >> 1) & 0x7];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	184 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	185 case FBUF_HILIGHT:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	186 b = levels[((color >> 9) & 0x7) + 7];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	187 g = levels[((color >> 5) & 0x7) + 7];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	188 r = levels[((color >> 1) & 0x7) + 7];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	189 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	190 case FBUF_MODE4:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	191 //TODO: Mode 4 has a separate DAC tap so this isn't quite correct
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	192 //TODO: blue channel has one of its taps offest on SMS1 and MD
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	193 b = levels[(color >> 4 & 0xC) \| (color >> 6 & 0x2)];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	194 g = levels[(color >> 2 & 0x8) \| (color >> 1 & 0x4) \| (color >> 4 & 0x2)];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	195 r = levels[(color << 1 & 0xC) \| (color >> 1 & 0x2)];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	196 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	197 case FBUF_TMS:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	198 index = color >> 1 & 0x7;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	199 index \|= color >> 2 & 0x8;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	200 if (type == VDP_TMS9918A) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	201 switch (index)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	202 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	203 case 0:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	204 case 1:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	205 r = g = b = 0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	206 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	207 case 2:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	208 r = 0x21; g = 0xC8; b = 0x42;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	209 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	210 case 3:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	211 r = 0x5E; g = 0xDC; b = 0x78;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	212 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	213 case 4:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	214 r = 0x54; g = 0x55; b = 0xED;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	215 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	216 case 5:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	217 r = 0x7D; g = 0x76; b = 0xFC;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	218 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	219 case 6:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	220 r = 0xD4; g = 0x52; b = 0x4D;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	221 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	222 case 7:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	223 r = 0x42; g = 0xEB; b = 0xF5;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	224 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	225 case 8:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	226 r = 0xFC; g = 0x55; b = 0x54;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	227 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	228 case 9:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	229 r = 0xFF; g = 0x79; b = 0x78;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	230 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	231 case 10:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	232 r = 0xD4; g = 0xC1; b = 0x54;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	233 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	234 case 11:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	235 r = 0xE6; g = 0xCE; b = 0x80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	236 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	237 case 12:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	238 r = 0x21; g = 0xB0; b = 0x3B;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	239 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	240 case 13:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	241 r = 0xC9; g = 0x5B; b = 0xBA;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	242 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	243 case 14:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	244 r = g = b = 0xCC;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	245 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	246 case 15:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	247 r = g = b = 0xFF;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	248 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	249 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	250 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	251 static const uint8_t tms_to_sms[] = {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	252 0x00, 0x00, 0x08, 0x0C, 0x10, 0x30, 0x01, 0x3C, 0x02, 0x03, 0x05, 0x0F, 0x04, 0x33, 0x15, 0x3F
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	253 };
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	254 index = tms_to_sms[index] << 1;
2258 a28e1042f4de Fix a few of the most glaring TMS9918A issues Michael Pavone <pavone@retrodev.com> parents: 2257 diff changeset	255 index = (index & 0xE) \| (index << 1 & 0xE0);
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	256 //TODO: Mode 4 has a separate DAC tap so this isn't quite correct
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	257 //TODO: blue channel has one of its taps offest on SMS1 and MD
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	258 b = levels[(index >> 4 & 0xC) \| (index >> 6 & 0x2)];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	259 g = levels[(index >> 2 & 0x8) \| (index >> 1 & 0x4) \| (index >> 4 & 0x2)];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	260 r = levels[(index << 1 & 0xC) \| (index >> 1 & 0x2)];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	261 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	262 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	263 default:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	264 b = levels[(color >> 8) & 0xE];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	265 g = levels[(color >> 4) & 0xE];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	266 r = levels[color & 0xE];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	267 }
2236 c149c929361c Fix color bug when switching between Game Gear and other Sega systems Michael Pavone <pavone@retrodev.com> parents: 2230 diff changeset	268 }
c149c929361c Fix color bug when switching between Game Gear and other Sega systems Michael Pavone <pavone@retrodev.com> parents: 2230 diff changeset	269 context->color_map[color] = render_map_color(r, g, b);
c149c929361c Fix color bug when switching between Game Gear and other Sega systems Michael Pavone <pavone@retrodev.com> parents: 2230 diff changeset	270 }
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 503 diff changeset	271
2236 c149c929361c Fix color bug when switching between Game Gear and other Sega systems Michael Pavone <pavone@retrodev.com> parents: 2230 diff changeset	272 if (!static_table_init_done) {
2241 48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	273
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	274 for (uint16_t mode4_addr = 0; mode4_addr < 0x4000; mode4_addr++)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	275 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	276 uint16_t mode5_addr = mode4_addr & 0x3DFD;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	277 mode5_addr \|= mode4_addr << 8 & 0x200;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	278 mode5_addr \|= mode4_addr >> 8 & 2;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	279 mode4_address_map[mode4_addr] = mode5_addr;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	280 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	281 for (uint32_t planar = 0; planar < 256; planar++)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	282 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	283 uint32_t chunky = 0;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	284 for (int bit = 7; bit >= 0; bit--)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	285 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	286 chunky = chunky << 4;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	287 chunky \|= planar >> bit & 1;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	288 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	289 planar_to_chunky[planar] = chunky;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	290 }
2236 c149c929361c Fix color bug when switching between Game Gear and other Sega systems Michael Pavone <pavone@retrodev.com> parents: 2230 diff changeset	291 static_table_init_done = 1;
426 add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	292 }
437 afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	293 for (uint8_t color = 0; color < (1 << (3 + 1 + 1 + 1)); color++)
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	294 {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	295 uint8_t src = color & DBG_SRC_MASK;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	296 if (src > DBG_SRC_S) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	297 context->debugcolors[color] = 0;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	298 } else {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	299 uint8_t r,g,b;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	300 b = debug_base[src][0];
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	301 g = debug_base[src][1];
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	302 r = debug_base[src][2];
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	303 if (color & DBG_PRIORITY)
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	304 {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	305 if (b) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	306 b += 48;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	307 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	308 if (g) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	309 g += 48;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	310 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	311 if (r) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	312 r += 48;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	313 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	314 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	315 if (color & DBG_SHADOW) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	316 b /= 2;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	317 g /= 2;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	318 r /=2 ;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	319 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	320 if (color & DBG_HILIGHT) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	321 if (b) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	322 b += 72;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	323 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	324 if (g) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	325 g += 72;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	326 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	327 if (r) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	328 r += 72;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	329 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	330 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	331 context->debugcolors[color] = render_map_color(r, g, b);
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	332 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	333 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	334 if (region_pal) {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	335 context->flags2 \|= FLAG2_REGION_PAL;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	336 }
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	337 update_video_params(context);
2686 05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	338
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	339 return context;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	340 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	341
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	342 static uint32_t mode5_sat_address(vdp_context *context)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	343 {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	344 uint32_t addr = context->regs[REG_SAT] << 9;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	345 if (!(context->regs[REG_MODE_2] & BIT_128K_VRAM)) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	346 addr &= 0xFFFF;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	347 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	348 if (context->regs[REG_MODE_4] & BIT_H40) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	349 addr &= 0x1FC00;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	350 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	351 return addr;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	352 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	353
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	354 static void vdp_check_update_sat(vdp_context *context, uint32_t address, uint16_t value)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	355 {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	356 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	357 if (!(address & 4)) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	358 uint32_t sat_address = mode5_sat_address(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	359 if(address >= sat_address && address < (sat_address + SAT_CACHE_SIZE*2)) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	360 uint16_t cache_address = address - sat_address;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	361 cache_address = (cache_address & 3) \| (cache_address >> 1 & 0x1FC);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	362 context->sat_cache[cache_address] = value >> 8;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	363 context->sat_cache[cache_address^1] = value;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	364 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	365 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	366 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	367 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	368
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	369 void vdp_check_update_sat_byte(vdp_context *context, uint32_t address, uint8_t value)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	370 {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	371 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	372 if (!(address & 4)) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	373 uint32_t sat_address = mode5_sat_address(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	374 if(address >= sat_address && address < (sat_address + SAT_CACHE_SIZE*2)) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	375 uint16_t cache_address = address - sat_address;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	376 cache_address = (cache_address & 3) \| (cache_address >> 1 & 0x1FC);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	377 context->sat_cache[cache_address] = value;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	378 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	379 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	380 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	381 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	382
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	383 static void write_vram_word(vdp_context *context, uint32_t address, uint16_t value)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	384 {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	385 address = (address & 0x3FC) \| (address >> 1 & 0xFC01) \| (address >> 9 & 0x2);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	386 address ^= 1;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	387 //TODO: Support an option to actually have 128KB of VRAM
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	388 context->vdpmem[address] = value;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	389 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	390
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	391 static void write_vram_byte(vdp_context *context, uint32_t address, uint8_t value)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	392 {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	393 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	394 address &= 0xFFFF;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	395 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	396 address = mode4_address_map[address & 0x3FFF];
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	397 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	398 context->vdpmem[address] = value;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	399 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	400
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	401 #define VSRAM_DIRTY_BITS 0xF800
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	402
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	403 //rough estimate of slot number at which border display starts
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	404 #define BG_START_SLOT 6
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	405
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	406 static void update_color_map(vdp_context *context, uint16_t index, uint16_t value)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	407 {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	408 context->colors[index] = context->color_map[value & CRAM_BITS];
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	409 context->colors[index + SHADOW_OFFSET] = context->color_map[(value & CRAM_BITS) \| FBUF_SHADOW];
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	410 context->colors[index + HIGHLIGHT_OFFSET] = context->color_map[(value & CRAM_BITS) \| FBUF_HILIGHT];
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	411 if (context->type == VDP_GAMEGEAR) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	412 context->colors[index + MODE4_OFFSET] = context->color_map[value & 0xFFF];
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	413 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	414 context->colors[index + MODE4_OFFSET] = context->color_map[(value & CRAM_BITS) \| FBUF_MODE4];
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	415 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	416 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	417
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	418 void write_cram_internal(vdp_context * context, uint16_t addr, uint16_t value)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	419 {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	420 context->cram[addr] = value;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	421 update_color_map(context, addr, value);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	422 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	423
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	424 static void write_cram(vdp_context * context, uint16_t address, uint16_t value)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	425 {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	426 uint16_t addr;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	427 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	428 addr = (address/2) & (CRAM_SIZE-1);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	429 } else if (context->type == VDP_GAMEGEAR) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	430 addr = (address/2) & 31;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	431 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	432 addr = address & 0x1F;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	433 value = (value << 1 & 0xE) \| (value << 2 & 0xE0) \| (value & 0xE00);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	434 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	435 write_cram_internal(context, addr, value);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	436
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	437 if (context->output && context->hslot >= BG_START_SLOT && (
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	438 context->vcounter < context->inactive_start + context->border_bot
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	439 \|\| context->vcounter > 0x200 - context->border_top
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	440 )) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	441 uint8_t bg_end_slot = BG_START_SLOT + (context->regs[REG_MODE_4] & BIT_H40) ? LINEBUF_SIZE/2 : (256+HORIZ_BORDER)/2;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	442 if (context->hslot < bg_end_slot) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	443 pixel_t color = (context->regs[REG_MODE_2] & BIT_MODE_5) ? context->colors[addr] : context->colors[addr + MODE4_OFFSET];
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	444 context->output[(context->hslot - BG_START_SLOT)*2 + 1] = color;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	445 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	446 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	447 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	448
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	449 #ifndef _WIN32
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	450 static int vdp_render_thread_main(void *vcontext)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	451 {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	452 vdp_context *context = vcontext;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	453 event_out event;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	454 for (;;)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	455 {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	456 event.autoinc = context->regs[REG_AUTOINC];
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	457 uint8_t etype = mem_reader_next_event(&event);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	458 if (etype == EVENT_EOF) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	459 break;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	460 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	461 vdp_run_context(context, event.cycle);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	462 switch (etype)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	463 {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	464 case EVENT_ADJUST:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	465 vdp_adjust_cycles(context, event.address);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	466 break;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	467 case EVENT_VDP_REG:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	468 context->regs[event.address] = event.value;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	469 if (event.address == REG_MODE_4) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	470 context->double_res = (event.value & (BIT_INTERLACE \| BIT_DOUBLE_RES)) == (BIT_INTERLACE \| BIT_DOUBLE_RES);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	471 if (!context->double_res) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	472 context->flags2 &= ~FLAG2_EVEN_FIELD;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	473 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	474 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	475 if (event.address == REG_MODE_1 \|\| event.address == REG_MODE_2 \|\| event.address == REG_MODE_4) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	476 update_video_params(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	477 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	478 break;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	479 case EVENT_VRAM_BYTE:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	480 case EVENT_VRAM_BYTE_DELTA:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	481 case EVENT_VRAM_BYTE_ONE:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	482 case EVENT_VRAM_BYTE_AUTO:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	483 vdp_check_update_sat_byte(context, event.address ^ 1, event.value);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	484 write_vram_byte(context, event.address ^ 1, event.value);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	485 break;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	486 case EVENT_VRAM_WORD:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	487 case EVENT_VRAM_WORD_DELTA:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	488 vdp_check_update_sat(context, event.address, event.value);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	489 write_vram_word(context, event.address, event.value);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	490 break;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	491 case EVENT_VDP_INTRAM:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	492 if (event.address < 128) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	493 write_cram(context, event.address, event.value);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	494 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	495 context->vsram[event.address&63] = event.value;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	496 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	497 break;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	498 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	499 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	500 return 0;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	501 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	502 #endif
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	503
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	504 static render_thread vdp_thread;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	505 vdp_context *init_vdp_context(uint8_t region_pal, uint8_t has_max_vsram, uint8_t type)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	506 {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	507 vdp_context *ret = init_vdp_context_int(region_pal, has_max_vsram, type);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	508 vdp_context *context;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	509 #ifndef _WIN32
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	510 if (render_is_threaded_video()) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	511 context = ret->renderer = init_vdp_context_int(region_pal, has_max_vsram, type);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	512 } else
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	513 #endif
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	514 {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	515 context = ret;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	516 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	517 if (headless) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	518 context->fb = malloc(512 * LINEBUF_SIZE * sizeof(pixel_t));
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	519 context->output_pitch = LINEBUF_SIZE * sizeof(pixel_t);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	520 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	521 context->cur_buffer = FRAMEBUFFER_ODD;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	522 context->fb = render_get_framebuffer(FRAMEBUFFER_ODD, &context->output_pitch);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	523 }
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	524 context->output = (pixel_t )(((char )context->fb) + context->output_pitch * context->border_top);
2686 05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	525 #ifndef _WIN32
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	526 if (ret->renderer) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	527 event_log_mem();
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	528 render_create_thread(&vdp_thread, "vdp_render", vdp_render_thread_main, ret->renderer);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	529 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	530 #endif
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	531 return ret;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	532 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	533
884 252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 822 diff changeset	534 void vdp_free(vdp_context *context)
252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 822 diff changeset	535 {
2030 bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39 Michael Pavone <pavone@retrodev.com> parents: 2013 diff changeset	536 if (headless) {
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39 Michael Pavone <pavone@retrodev.com> parents: 2013 diff changeset	537 free(context->fb);
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39 Michael Pavone <pavone@retrodev.com> parents: 2013 diff changeset	538 }
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	539 for (int i = 0; i < NUM_DEBUG_TYPES; i++)
2030 bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39 Michael Pavone <pavone@retrodev.com> parents: 2013 diff changeset	540 {
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39 Michael Pavone <pavone@retrodev.com> parents: 2013 diff changeset	541 if (context->enabled_debuggers & (1 << i)) {
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39 Michael Pavone <pavone@retrodev.com> parents: 2013 diff changeset	542 vdp_toggle_debug_view(context, i);
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39 Michael Pavone <pavone@retrodev.com> parents: 2013 diff changeset	543 }
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39 Michael Pavone <pavone@retrodev.com> parents: 2013 diff changeset	544 }
2686 05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	545 #ifndef _WIN32
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	546 if (context->renderer) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	547 event_log_mem_stop();
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	548 vdp_free(context->renderer);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	549 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	550 #endif
884 252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 822 diff changeset	551 free(context);
252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 822 diff changeset	552 }
252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 822 diff changeset	553
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	554 static int is_refresh(vdp_context * context, uint32_t slot)
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	555 {
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	556 if (context->regs[REG_MODE_4] & BIT_H40) {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	557 return slot == 250 \|\| slot == 26 \|\| slot == 59 \|\| slot == 90 \|\| slot == 122 \|\| slot == 154;
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	558 } else {
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	559 //TODO: Figure out which slots are refresh when display is off in 32-cell mode
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	560 //These numbers are guesses based on H40 numbers
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	561 return slot == 243 \|\| slot == 19 \|\| slot == 51 \|\| slot == 83 \|\| slot == 115;
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	562 //The numbers below are the refresh slots during active display
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	563 //return (slot == 29 \|\| slot == 61 \|\| slot == 93 \|\| slot == 125);
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	564 }
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	565 }
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	566
1151 681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	567 static void increment_address(vdp_context *context)
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	568 {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	569 context->address += context->regs[REG_AUTOINC];
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	570 if (!(context->regs[REG_MODE_2] & BIT_MODE_5)) {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	571 context->address++;
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	572 }
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	573 }
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	574
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	575 static void render_sprite_cells(vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	576 {
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	577 if (context->cur_slot < 0) {
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	578 //should this be 16 in H32?
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	579 context->cur_slot += 32;
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	580 }
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	581 if (context->cur_slot >= MAX_SPRITES_LINE) {
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	582 context->cur_slot--;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	583 return;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	584 }
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	585 sprite_draw * d = context->sprite_draw_list + context->cur_slot;
1871 e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	586 uint16_t address = d->address;
e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	587 address += context->sprite_x_offset * d->height * 4;
e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	588 context->serial_address = address;
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	589 if (d->x_pos) {
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	590 uint16_t dir;
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	591 int16_t x;
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	592 if (d->h_flip) {
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	593 x = d->x_pos + 7 + 8 * (d->width - context->sprite_x_offset - 1);
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	594 dir = -1;
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	595 } else {
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	596 x = d->x_pos + context->sprite_x_offset * 8;
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	597 dir = 1;
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	598 }
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	599 context->flags \|= FLAG_CAN_MASK;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	600 if (!(context->flags & FLAG_MASKED)) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	601 x -= 128;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	602 //printf("Draw Slot %d of %d, Rendering sprite cell from %X to x: %d\n", context->cur_slot, context->sprite_draws, d->address, x);
1886 183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	603 uint8_t collide = 0;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	604 if (x >= 8 && x < 312) {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	605 //sprite is fully visible
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	606 for (; address != ((context->serial_address+4) & 0xFFFF); address++) {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	607 uint8_t pixel = context->vdpmem[address] >> 4;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	608 if (!(context->linebuf[x] & 0xF)) {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	609 context->linebuf[x] = pixel \| d->pal_priority;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	610 } else {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	611 collide \|= pixel;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	612 }
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	613 x += dir;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	614 pixel = context->vdpmem[address] & 0xF;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	615 if (!(context->linebuf[x] & 0xF)) {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	616 context->linebuf[x] = pixel \| d->pal_priority;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	617 } else {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	618 collide \|= pixel;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	619 }
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	620 x += dir;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	621 }
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	622 } else if (x > -8 && x < 327) {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	623 //sprite is partially visible
1884 b5549258b98b Slightly gross fix for edge case introduced in border cropping change Michael Pavone <pavone@retrodev.com> parents: 1881 diff changeset	624 for (; address != ((context->serial_address+4) & 0xFFFF); address++) {
b5549258b98b Slightly gross fix for edge case introduced in border cropping change Michael Pavone <pavone@retrodev.com> parents: 1881 diff changeset	625 if (x >= 0 && x < 320) {
1886 183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	626 uint8_t pixel = context->vdpmem[address] >> 4;
1884 b5549258b98b Slightly gross fix for edge case introduced in border cropping change Michael Pavone <pavone@retrodev.com> parents: 1881 diff changeset	627 if (!(context->linebuf[x] & 0xF)) {
1886 183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	628 context->linebuf[x] = pixel \| d->pal_priority;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	629 } else {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	630 collide \|= pixel;
1884 b5549258b98b Slightly gross fix for edge case introduced in border cropping change Michael Pavone <pavone@retrodev.com> parents: 1881 diff changeset	631 }
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	632 }
1884 b5549258b98b Slightly gross fix for edge case introduced in border cropping change Michael Pavone <pavone@retrodev.com> parents: 1881 diff changeset	633 x += dir;
b5549258b98b Slightly gross fix for edge case introduced in border cropping change Michael Pavone <pavone@retrodev.com> parents: 1881 diff changeset	634 if (x >= 0 && x < 320) {
1886 183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	635 uint8_t pixel = context->vdpmem[address] & 0xF;
1884 b5549258b98b Slightly gross fix for edge case introduced in border cropping change Michael Pavone <pavone@retrodev.com> parents: 1881 diff changeset	636 if (!(context->linebuf[x] & 0xF)) {
1886 183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	637 context->linebuf[x] = pixel \| d->pal_priority;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	638 } else {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	639 collide \|= pixel;
1884 b5549258b98b Slightly gross fix for edge case introduced in border cropping change Michael Pavone <pavone@retrodev.com> parents: 1881 diff changeset	640 }
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	641 }
1884 b5549258b98b Slightly gross fix for edge case introduced in border cropping change Michael Pavone <pavone@retrodev.com> parents: 1881 diff changeset	642 x += dir;
1886 183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	643 }
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	644 }
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	645 if (collide) {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	646 context->flags2 \|= FLAG2_SPRITE_COLLIDE;
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	647 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	648 }
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	649 } else if (context->flags & FLAG_CAN_MASK) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	650 context->flags \|= FLAG_MASKED;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	651 context->flags &= ~FLAG_CAN_MASK;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	652 }
1871 e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	653
e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	654 context->sprite_x_offset++;
e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	655 if (context->sprite_x_offset == d->width) {
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	656 d->x_pos = 0;
1871 e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	657 context->sprite_x_offset = 0;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	658 context->cur_slot--;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	659 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	660 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	661
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	662 static void fetch_sprite_cells_mode4(vdp_context * context)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	663 {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	664 if (context->sprite_index >= context->sprite_draws) {
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	665 sprite_draw * d = context->sprite_draw_list + context->sprite_index;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	666 uint32_t address = mode4_address_map[d->address & 0x3FFF];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	667 context->fetch_tmp[0] = context->vdpmem[address];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	668 context->fetch_tmp[1] = context->vdpmem[address + 1];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	669 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	670 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	671
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	672 static void render_sprite_cells_mode4(vdp_context * context)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	673 {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	674 if (context->sprite_index >= context->sprite_draws) {
2204 dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	675 uint8_t zoom = context->type != VDP_GENESIS && (context->regs[REG_MODE_2] & BIT_SPRITE_ZM);
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	676 if (context->type == VDP_SMS && context->sprite_index < 4) {
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	677 zoom = 0;
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	678 }
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	679 sprite_draw * d = context->sprite_draw_list + context->sprite_index;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	680 uint32_t pixels = planar_to_chunky[context->fetch_tmp[0]] << 1;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	681 pixels \|= planar_to_chunky[context->fetch_tmp[1]];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	682 uint32_t address = mode4_address_map[(d->address + 2) & 0x3FFF];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	683 pixels \|= planar_to_chunky[context->vdpmem[address]] << 3;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	684 pixels \|= planar_to_chunky[context->vdpmem[address + 1]] << 2;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	685 int x = d->x_pos & 0xFF;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	686 for (int i = 28; i >= 0; i -= 4, x++)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	687 {
2503 fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!) Michael Pavone <pavone@retrodev.com> parents: 2494 diff changeset	688 uint8_t pixel = pixels >> i & 0xF;
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!) Michael Pavone <pavone@retrodev.com> parents: 2494 diff changeset	689 if (pixel) {
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!) Michael Pavone <pavone@retrodev.com> parents: 2494 diff changeset	690 if (!context->linebuf[x]) {
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!) Michael Pavone <pavone@retrodev.com> parents: 2494 diff changeset	691 context->linebuf[x] = pixel;
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!) Michael Pavone <pavone@retrodev.com> parents: 2494 diff changeset	692 } else if(
1155 da6a1f156f24 Fix Mode 4 sprite collision flag Michael Pavone <pavone@retrodev.com> parents: 1154 diff changeset	693 ((context->regs[REG_MODE_1] & BIT_SPRITE_8PX) && x > 8)
da6a1f156f24 Fix Mode 4 sprite collision flag Michael Pavone <pavone@retrodev.com> parents: 1154 diff changeset	694 \|\| ((!(context->regs[REG_MODE_1] & BIT_SPRITE_8PX)) && x < 256)
da6a1f156f24 Fix Mode 4 sprite collision flag Michael Pavone <pavone@retrodev.com> parents: 1154 diff changeset	695 ) {
da6a1f156f24 Fix Mode 4 sprite collision flag Michael Pavone <pavone@retrodev.com> parents: 1154 diff changeset	696 context->flags2 \|= FLAG2_SPRITE_COLLIDE;
da6a1f156f24 Fix Mode 4 sprite collision flag Michael Pavone <pavone@retrodev.com> parents: 1154 diff changeset	697 }
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	698 }
2204 dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	699 if (zoom) {
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	700 x++;
2503 fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!) Michael Pavone <pavone@retrodev.com> parents: 2494 diff changeset	701 if (pixel) {
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!) Michael Pavone <pavone@retrodev.com> parents: 2494 diff changeset	702 if (!context->linebuf[x]) {
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!) Michael Pavone <pavone@retrodev.com> parents: 2494 diff changeset	703 context->linebuf[x] = pixel;
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!) Michael Pavone <pavone@retrodev.com> parents: 2494 diff changeset	704 } else if(
2204 dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	705 ((context->regs[REG_MODE_1] & BIT_SPRITE_8PX) && x > 8)
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	706 \|\| ((!(context->regs[REG_MODE_1] & BIT_SPRITE_8PX)) && x < 256)
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	707 ) {
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	708 context->flags2 \|= FLAG2_SPRITE_COLLIDE;
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	709 }
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	710 }
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	711 }
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	712 }
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	713 context->sprite_index--;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	714 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	715 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	716
322 8e2fa485c0f2 Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview. Mike Pavone <pavone@retrodev.com> parents: 318 diff changeset	717 void vdp_print_sprite_table(vdp_context * context)
8e2fa485c0f2 Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview. Mike Pavone <pavone@retrodev.com> parents: 318 diff changeset	718 {
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	719 if (context->type == VDP_GENESIS && context->regs[REG_MODE_2] & BIT_MODE_5) {
1320 df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	720 uint16_t sat_address = mode5_sat_address(context);
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	721 uint16_t current_index = 0;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	722 uint8_t count = 0;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	723 do {
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	724 uint16_t address = current_index * 8 + sat_address;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	725 uint16_t cache_address = current_index * 4;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	726 uint8_t height = ((context->sat_cache[cache_address+2] & 0x3) + 1) * 8;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	727 uint8_t width = (((context->sat_cache[cache_address+2] >> 2) & 0x3) + 1) * 8;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	728 int16_t y = ((context->sat_cache[cache_address] & 0x3) << 8 \| context->sat_cache[cache_address+1]) & 0x1FF;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	729 int16_t x = ((context->vdpmem[address+ 6] & 0x3) << 8 \| context->vdpmem[address + 7]) & 0x1FF;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	730 uint16_t link = context->sat_cache[cache_address+3] & 0x7F;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	731 uint8_t pal = context->vdpmem[address + 4] >> 5 & 0x3;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	732 uint8_t pri = context->vdpmem[address + 4] >> 7;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	733 uint16_t pattern = ((context->vdpmem[address + 4] << 8 \| context->vdpmem[address + 5]) & 0x7FF) << 5;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	734 printf("Sprite %d: X=%d(%d), Y=%d(%d), Width=%u, Height=%u, Link=%u, Pal=%u, Pri=%u, Pat=%X\n", current_index, x, x-128, y, y-128, width, height, link, pal, pri, pattern);
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	735 current_index = link;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	736 count++;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	737 } while (current_index != 0 && count < 80);
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	738 } else if (context->type != VDP_TMS9918A && context->regs[REG_MODE_1] & BIT_MODE_4) {
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	739 uint16_t sat_address = (context->regs[REG_SAT] & 0x7E) << 7;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	740 for (int i = 0; i < 64; i++)
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	741 {
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	742 uint8_t y = context->vdpmem[mode4_address_map[sat_address + (i ^ 1)]];
c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	743 if (y == 0xD0) {
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	744 break;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	745 }
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	746 uint8_t x = context->vdpmem[mode4_address_map[sat_address + 0x80 + i*2 + 1]];
c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	747 uint16_t tile_address = context->vdpmem[mode4_address_map[sat_address + 0x80 + i2]] 32
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	748 + (context->regs[REG_STILE_BASE] << 11 & 0x2000);
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	749 if (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) {
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	750 tile_address &= ~32;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	751 }
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	752 printf("Sprite %d: X=%d, Y=%d, Pat=%X\n", i, x, y, tile_address);
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	753 }
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	754 } else if (context->type != VDP_GENESIS) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	755 uint16_t sat_address = context->regs[REG_SAT] << 7 & 0x3F80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	756 for (int i = 0; i < 32; i++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	757 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	758 uint16_t address = i << 2 \| sat_address;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	759 int16_t y = context->vdpmem[mode4_address_map[address++] ^ 1];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	760 if (y == 208) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	761 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	762 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	763 if (y > 192) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	764 y -= 256;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	765 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	766 int16_t x = context->vdpmem[mode4_address_map[address++] ^ 1];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	767 uint8_t name = context->vdpmem[mode4_address_map[address++] ^ 1];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	768 uint8_t tag = context->vdpmem[mode4_address_map[address] ^ 1];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	769 if (tag & 0x80) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	770 x -= 32;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	771 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	772 tag &= 0xF;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	773 printf("Sprite %d: X=%d, Y=%d, Pat=%X, Color=%X\n", i, x, y, name, tag);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	774 }
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	775 }
322 8e2fa485c0f2 Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview. Mike Pavone <pavone@retrodev.com> parents: 318 diff changeset	776 }
8e2fa485c0f2 Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview. Mike Pavone <pavone@retrodev.com> parents: 318 diff changeset	777
705 ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	778 #define VRAM_READ 0 //0000
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	779 #define VRAM_WRITE 1 //0001
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	780 //2 would trigger register write 0010
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	781 #define CRAM_WRITE 3 //0011
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	782 #define VSRAM_READ 4 //0100
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	783 #define VSRAM_WRITE 5//0101
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	784 //6 would trigger regsiter write 0110
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	785 //7 is a mystery //0111
705 ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	786 #define CRAM_READ 8 //1000
2334 57ebbc1ade30 Fix regression in mega-color image demos Michael Pavone <pavone@retrodev.com> parents: 2283 diff changeset	787 //writes go nowhere, acts 8-bit wide like VRAM //1001
705 ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	788 //A would trigger register write 1010
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	789 //B is a mystery 1011
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	790 #define VRAM_READ8 0xC //1100
2334 57ebbc1ade30 Fix regression in mega-color image demos Michael Pavone <pavone@retrodev.com> parents: 2283 diff changeset	791 //writes go nowhere, acts 16-bit wide like VSRAM/CRAM 1101
705 ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	792 //E would trigger register write 1110
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	793 //F is a mystery 1111
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	794
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	795 //Possible theory on how bits work
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	796 //CD0 = Read/Write flag
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	797 //CD2,(CD1\|CD3) = RAM type
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	798 // 00 = VRAM
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	799 // 01 = CRAM
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	800 // 10 = VSRAM
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	801 // 11 = VRAM8
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	802 //Would result in
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	803 // 7 = VRAM8 write
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	804 // 9 = CRAM write alias
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	805 // B = CRAM write alias
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	806 // D = VRAM8 write alias
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	807 // F = VRAM8 write alais
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	808
705 ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	809 #define DMA_START 0x20
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	810
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	811 static const char * cd_name(uint8_t cd)
705 ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	812 {
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	813 switch (cd & 0xF)
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	814 {
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	815 case VRAM_READ:
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	816 return "VRAM read";
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	817 case VRAM_WRITE:
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	818 return "VRAM write";
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	819 case CRAM_WRITE:
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	820 return "CRAM write";
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	821 case VSRAM_READ:
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	822 return "VSRAM read";
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	823 case VSRAM_WRITE:
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	824 return "VSRAM write";
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	825 case VRAM_READ8:
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	826 return "VRAM read (undocumented 8-bit mode)";
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	827 default:
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	828 return "invalid";
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	829 }
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	830 }
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	831
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	832 void vdp_print_reg_explain(vdp_context * context)
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	833 {
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	834 char * hscroll[] = {"full", "7-line", "cell", "line"};
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	835 printf("Mode Group\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	836 "00: %.2X \| H-ints %s, Pal Select %d, HVC latch %s, Display gen %s\n"
1331 9bba5ff5beb8 Add 128K VRAM bit to VDP register print in debugger Michael Pavone <pavone@retrodev.com> parents: 1325 diff changeset	837 "01: %.2X \| Display %s, V-ints %s, Height: %d, Mode %d, %dK VRAM\n"
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	838 "0B: %.2X \| E-ints %s, V-Scroll: %s, H-Scroll: %s\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	839 "0C: %.2X \| Width: %d, Shadow/Highlight: %s\n",
757 483f7e7926a6 More clang warning cleanup Michael Pavone <pavone@retrodev.com> parents: 748 diff changeset	840 context->regs[REG_MODE_1], context->regs[REG_MODE_1] & BIT_HINT_EN ? "enabled" : "disabled", (context->regs[REG_MODE_1] & BIT_PAL_SEL) != 0,
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	841 context->regs[REG_MODE_1] & BIT_HVC_LATCH ? "enabled" : "disabled", context->regs[REG_MODE_1] & BIT_DISP_DIS ? "disabled" : "enabled",
450 3758bcdae5de Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty Mike Pavone <pavone@retrodev.com> parents: 438 diff changeset	842 context->regs[REG_MODE_2], context->regs[REG_MODE_2] & BIT_DISP_EN ? "enabled" : "disabled", context->regs[REG_MODE_2] & BIT_VINT_EN ? "enabled" : "disabled",
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	843 context->regs[REG_MODE_2] & BIT_PAL ? 30 : 28, context->regs[REG_MODE_2] & BIT_MODE_5 ? 5 : 4, context->regs[REG_MODE_1] & BIT_128K_VRAM ? 128 : 64,
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	844 context->regs[REG_MODE_3], context->regs[REG_MODE_3] & BIT_EINT_EN ? "enabled" : "disabled", context->regs[REG_MODE_3] & BIT_VSCROLL ? "2 cell" : "full",
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	845 hscroll[context->regs[REG_MODE_3] & 0x3],
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	846 context->regs[REG_MODE_4], context->regs[REG_MODE_4] & BIT_H40 ? 40 : 32, context->regs[REG_MODE_4] & BIT_HILIGHT ? "enabled" : "disabled");
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	847 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	848 printf("\nTable Group\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	849 "02: %.2X \| Scroll A Name Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	850 "03: %.2X \| Window Name Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	851 "04: %.2X \| Scroll B Name Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	852 "05: %.2X \| Sprite Attribute Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	853 "0D: %.2X \| HScroll Data Table: $%.4X\n",
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	854 context->regs[REG_SCROLL_A], (context->regs[REG_SCROLL_A] & 0x38) << 10,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	855 context->regs[REG_WINDOW], (context->regs[REG_WINDOW] & (context->regs[REG_MODE_4] & BIT_H40 ? 0x3C : 0x3E)) << 10,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	856 context->regs[REG_SCROLL_B], (context->regs[REG_SCROLL_B] & 0x7) << 13,
1320 df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	857 context->regs[REG_SAT], mode5_sat_address(context),
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	858 context->regs[REG_HSCROLL], (context->regs[REG_HSCROLL] & 0x3F) << 10);
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	859 } else {
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	860 printf("\nTable Group\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	861 "02: %.2X \| Background Name Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	862 "05: %.2X \| Sprite Attribute Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	863 "06: %.2X \| Sprite Tile Base: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	864 "08: %.2X \| Background X Scroll: %d\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	865 "09: %.2X \| Background Y Scroll: %d\n",
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	866 context->regs[REG_SCROLL_A], (context->regs[REG_SCROLL_A] & 0xE) << 10,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	867 context->regs[REG_SAT], (context->regs[REG_SAT] & 0x7E) << 7,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	868 context->regs[REG_STILE_BASE], (context->regs[REG_STILE_BASE] & 2) << 11,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	869 context->regs[REG_X_SCROLL], context->regs[REG_X_SCROLL],
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	870 context->regs[REG_Y_SCROLL], context->regs[REG_Y_SCROLL]);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	871
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	872 }
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	873 char * sizes[] = {"32", "64", "invalid", "128"};
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	874 printf("\nMisc Group\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	875 "07: %.2X \| Backdrop Color: $%X\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	876 "0A: %.2X \| H-Int Counter: %u\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	877 "0F: %.2X \| Auto-increment: $%X\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	878 "10: %.2X \| Scroll A/B Size: %sx%s\n",
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 503 diff changeset	879 context->regs[REG_BG_COLOR], context->regs[REG_BG_COLOR],
450 3758bcdae5de Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty Mike Pavone <pavone@retrodev.com> parents: 438 diff changeset	880 context->regs[REG_HINT], context->regs[REG_HINT],
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	881 context->regs[REG_AUTOINC], context->regs[REG_AUTOINC],
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	882 context->regs[REG_SCROLL], sizes[context->regs[REG_SCROLL] & 0x3], sizes[context->regs[REG_SCROLL] >> 4 & 0x3]);
621 5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	883 char * src_types[] = {"68K", "68K", "Copy", "Fill"};
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	884 printf("\nDMA Group\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	885 "13: %.2X \|\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	886 "14: %.2X \| DMA Length: $%.4X words\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	887 "15: %.2X \|\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	888 "16: %.2X \|\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	889 "17: %.2X \| DMA Source Address: $%.6X, Type: %s\n",
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	890 context->regs[REG_DMALEN_L],
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	891 context->regs[REG_DMALEN_H], context->regs[REG_DMALEN_H] << 8 \| context->regs[REG_DMALEN_L],
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	892 context->regs[REG_DMASRC_L],
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	893 context->regs[REG_DMASRC_M],
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	894 context->regs[REG_DMASRC_H],
629 9089951a1994 Small fix to display of DMA source address in vr debug command Michael Pavone <pavone@retrodev.com> parents: 624 diff changeset	895 context->regs[REG_DMASRC_H] << 17 \| context->regs[REG_DMASRC_M] << 9 \| context->regs[REG_DMASRC_L] << 1,
621 5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	896 src_types[context->regs[REG_DMASRC_H] >> 6 & 3]);
1628 3c1661305219 Avoid changing VDP status flags when executing debugger commands Michael Pavone <pavone@retrodev.com> parents: 1454 diff changeset	897 uint8_t old_flags = context->flags;
3c1661305219 Avoid changing VDP status flags when executing debugger commands Michael Pavone <pavone@retrodev.com> parents: 1454 diff changeset	898 uint8_t old_flags2 = context->flags2;
438 b3cee2fe690b Add address/cd registers to VDP debug message Mike Pavone <pavone@retrodev.com> parents: 437 diff changeset	899 printf("\nInternal Group\n"
b3cee2fe690b Add address/cd registers to VDP debug message Mike Pavone <pavone@retrodev.com> parents: 437 diff changeset	900 "Address: %X\n"
705 ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	901 "CD: %X - %s\n"
647 5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	902 "Pending: %s\n"
5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	903 "VCounter: %d\n"
995 2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	904 "HCounter: %d\n"
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	905 "VINT Pending: %s\n"
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	906 "HINT Pending: %s\n"
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	907 "Status: %X\n",
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	908 context->address, context->cd, cd_name(context->cd),
1150 322d28e6f13c Display both byte and word pending values to better reflect VDP pending state in PBC mode Michael Pavone <pavone@retrodev.com> parents: 1149 diff changeset	909 (context->flags & FLAG_PENDING) ? "word" : (context->flags2 & FLAG2_BYTE_PENDING) ? "byte" : "none",
995 2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	910 context->vcounter, context->hslot*2, (context->flags2 & FLAG2_VINT_PENDING) ? "true" : "false",
2358 4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support Michael Pavone <pavone@retrodev.com> parents: 2338 diff changeset	911 (context->flags2 & FLAG2_HINT_PENDING) ? "true" : "false", vdp_status(context));
2675 dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	912 printf("\nDebug Register: %X \| Output disabled: %s, Force Layer: %d\n", context->test_regs[0],
dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	913 (context->test_regs[0] & TEST_BIT_DISABLE) ? "true" : "false", context->test_regs[0] >> 7 & 3
1871 e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	914 );
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	915 }
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	916
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	917 static uint8_t is_active(vdp_context *context)
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	918 {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	919 return context->state != INACTIVE && (context->regs[REG_MODE_2] & BIT_DISP_EN) != 0;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	920 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	921
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	922 static void scan_sprite_table(uint32_t line, vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	923 {
2575 dddd16a6c69b Fix "sticky" sprite overflow regression from previous sprite overflow flag fix Michael Pavone <pavone@retrodev.com> parents: 2574 diff changeset	924 if (context->sprite_index &&
dddd16a6c69b Fix "sticky" sprite overflow regression from previous sprite overflow flag fix Michael Pavone <pavone@retrodev.com> parents: 2574 diff changeset	925 (((uint8_t)context->slot_counter) < context->max_sprites_line \|\| !(context->flags & FLAG_SPRITE_OFLOW))
dddd16a6c69b Fix "sticky" sprite overflow regression from previous sprite overflow flag fix Michael Pavone <pavone@retrodev.com> parents: 2574 diff changeset	926 ) {
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	927 line += 1;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	928 uint16_t ymask, ymin;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	929 uint8_t height_mult;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	930 if (context->double_res) {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	931 line *= 2;
1077 1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode. Michael Pavone <pavone@retrodev.com> parents: 1076 diff changeset	932 if (context->flags2 & FLAG2_EVEN_FIELD) {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	933 line++;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	934 }
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	935 ymask = 0x3FF;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	936 ymin = 256;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	937 height_mult = 16;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	938 } else {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	939 ymask = 0x1FF;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	940 ymin = 128;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	941 height_mult = 8;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	942 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	943 context->sprite_index &= 0x7F;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	944 //TODO: Implement squirelly behavior documented by Kabuto
2230 3888c7ed4e36 Fix handling of sprite indices >= 64 in H32 mode Michael Pavone <pavone@retrodev.com> parents: 2227 diff changeset	945 if (context->sprite_index >= MAX_SPRITES_FRAME) {
38 898e3d035f42 Implement sprite index >= sprite limit triggers sprite limit behavior Mike Pavone <pavone@retrodev.com> parents: 37 diff changeset	946 context->sprite_index = 0;
898e3d035f42 Implement sprite index >= sprite limit triggers sprite limit behavior Mike Pavone <pavone@retrodev.com> parents: 37 diff changeset	947 return;
898e3d035f42 Implement sprite index >= sprite limit triggers sprite limit behavior Mike Pavone <pavone@retrodev.com> parents: 37 diff changeset	948 }
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	949 uint16_t address = context->sprite_index * 4;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	950 line += ymin;
1346 f7ca42e020fd Fix sprite rendering in double resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 1344 diff changeset	951 line &= ymask;
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	952 uint16_t y = ((context->sat_cache[address] & 0x3) << 8 \| context->sat_cache[address+1]) & ymask;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	953 uint8_t height = ((context->sat_cache[address+2] & 0x3) + 1) * height_mult;
21 72ce60cb1711 Sprites somewhat less broken Mike Pavone <pavone@retrodev.com> parents: 20 diff changeset	954 //printf("Sprite %d \| y: %d, height: %d\n", context->sprite_index, y, height);
72ce60cb1711 Sprites somewhat less broken Mike Pavone <pavone@retrodev.com> parents: 20 diff changeset	955 if (y <= line && line < (y + height)) {
2574 0da40b1978fd Sprite overflow flag should only be set when there are too many sprites in a line and not when there are just too many sprite pixels. Fixes regression in Madou Monogatari I Michael Pavone <pavone@retrodev.com> parents: 2572 diff changeset	956 if (((uint8_t)context->slot_counter) == context->max_sprites_line) {
0da40b1978fd Sprite overflow flag should only be set when there are too many sprites in a line and not when there are just too many sprite pixels. Fixes regression in Madou Monogatari I Michael Pavone <pavone@retrodev.com> parents: 2572 diff changeset	957 context->flags \|= FLAG_SPRITE_OFLOW;
0da40b1978fd Sprite overflow flag should only be set when there are too many sprites in a line and not when there are just too many sprite pixels. Fixes regression in Madou Monogatari I Michael Pavone <pavone@retrodev.com> parents: 2572 diff changeset	958 return;
0da40b1978fd Sprite overflow flag should only be set when there are too many sprites in a line and not when there are just too many sprite pixels. Fixes regression in Madou Monogatari I Michael Pavone <pavone@retrodev.com> parents: 2572 diff changeset	959 }
27 aa1c47fab3f1 Fix sprite transparency for overlapping sprites Mike Pavone <pavone@retrodev.com> parents: 26 diff changeset	960 //printf("Sprite %d at y: %d with height %d is on line %d\n", context->sprite_index, y, height, line);
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	961 context->sprite_info_list[context->slot_counter].size = context->sat_cache[address+2];
1358 3716b90d3470 Fix regression in Mode 4 sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1357 diff changeset	962 context->sprite_info_list[context->slot_counter++].index = context->sprite_index;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	963 }
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	964 context->sprite_index = context->sat_cache[address+3] & 0x7F;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	965 if (context->sprite_index && ((uint8_t)context->slot_counter) < context->max_sprites_line)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	966 {
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	967 //TODO: Implement squirelly behavior documented by Kabuto
2230 3888c7ed4e36 Fix handling of sprite indices >= 64 in H32 mode Michael Pavone <pavone@retrodev.com> parents: 2227 diff changeset	968 if (context->sprite_index >= MAX_SPRITES_FRAME) {
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	969 context->sprite_index = 0;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	970 return;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	971 }
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	972 address = context->sprite_index * 4;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	973 y = ((context->sat_cache[address] & 0x3) << 8 \| context->sat_cache[address+1]) & ymask;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	974 height = ((context->sat_cache[address+2] & 0x3) + 1) * height_mult;
323 8c01b4154480 Properly mask sprite X and Y coordinates Mike Pavone <pavone@retrodev.com> parents: 322 diff changeset	975 //printf("Sprite %d \| y: %d, height: %d\n", context->sprite_index, y, height);
21 72ce60cb1711 Sprites somewhat less broken Mike Pavone <pavone@retrodev.com> parents: 20 diff changeset	976 if (y <= line && line < (y + height)) {
2574 0da40b1978fd Sprite overflow flag should only be set when there are too many sprites in a line and not when there are just too many sprite pixels. Fixes regression in Madou Monogatari I Michael Pavone <pavone@retrodev.com> parents: 2572 diff changeset	977 if (((uint8_t)context->slot_counter) == context->max_sprites_line) {
0da40b1978fd Sprite overflow flag should only be set when there are too many sprites in a line and not when there are just too many sprite pixels. Fixes regression in Madou Monogatari I Michael Pavone <pavone@retrodev.com> parents: 2572 diff changeset	978 context->flags \|= FLAG_SPRITE_OFLOW;
0da40b1978fd Sprite overflow flag should only be set when there are too many sprites in a line and not when there are just too many sprite pixels. Fixes regression in Madou Monogatari I Michael Pavone <pavone@retrodev.com> parents: 2572 diff changeset	979 return;
0da40b1978fd Sprite overflow flag should only be set when there are too many sprites in a line and not when there are just too many sprite pixels. Fixes regression in Madou Monogatari I Michael Pavone <pavone@retrodev.com> parents: 2572 diff changeset	980 }
27 aa1c47fab3f1 Fix sprite transparency for overlapping sprites Mike Pavone <pavone@retrodev.com> parents: 26 diff changeset	981 //printf("Sprite %d at y: %d with height %d is on line %d\n", context->sprite_index, y, height, line);
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	982 context->sprite_info_list[context->slot_counter].size = context->sat_cache[address+2];
1358 3716b90d3470 Fix regression in Mode 4 sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1357 diff changeset	983 context->sprite_info_list[context->slot_counter++].index = context->sprite_index;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	984 }
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	985 context->sprite_index = context->sat_cache[address+3] & 0x7F;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	986 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	987 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	988 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	989
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	990 static void scan_sprite_table_mode4(vdp_context * context)
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	991 {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	992 if (context->sprite_index < MAX_SPRITES_FRAME_H32) {
2511 e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2510 diff changeset	993 int16_t line = context->vcounter;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	994 line &= 0xFF;
2511 e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2510 diff changeset	995 if (line > context->inactive_start) {
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2510 diff changeset	996 line -= 0x100;
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2510 diff changeset	997 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	998
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	999 uint32_t sat_address = mode4_address_map[(context->regs[REG_SAT] << 7 & 0x3F00) + context->sprite_index];
2511 e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2510 diff changeset	1000 int16_t y = context->vdpmem[sat_address+1];
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1001 uint32_t size = (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) ? 16 : 8;
2511 e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2510 diff changeset	1002 int16_t ysize = size;
2204 dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	1003 uint8_t zoom = context->type != VDP_GENESIS && (context->regs[REG_MODE_2] & BIT_SPRITE_ZM);
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	1004 if (zoom) {
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	1005 ysize *= 2;
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	1006 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1007
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	1008 if (y == 0xd0) {
1122 d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	1009 context->sprite_index = MAX_SPRITES_FRAME_H32;
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	1010 return;
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	1011 } else {
2511 e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2510 diff changeset	1012 if (y > context->inactive_start) {
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2510 diff changeset	1013 y -= 0x100;
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2510 diff changeset	1014 }
2204 dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	1015 if (y <= line && line < (y + ysize)) {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	1016 if (!context->slot_counter) {
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	1017 context->sprite_index = MAX_SPRITES_FRAME_H32;
2574 0da40b1978fd Sprite overflow flag should only be set when there are too many sprites in a line and not when there are just too many sprite pixels. Fixes regression in Madou Monogatari I Michael Pavone <pavone@retrodev.com> parents: 2572 diff changeset	1018 context->flags \|= FLAG_SPRITE_OFLOW;
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	1019 return;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	1020 }
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1021 context->sprite_info_list[--(context->slot_counter)].size = size;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1022 context->sprite_info_list[context->slot_counter].index = context->sprite_index;
1358 3716b90d3470 Fix regression in Mode 4 sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1357 diff changeset	1023 context->sprite_info_list[context->slot_counter].y = y;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1024 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1025 context->sprite_index++;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1026 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1027
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	1028 if (context->sprite_index < MAX_SPRITES_FRAME_H32) {
1138 25268334a24c Fix Mode 4 sprite table Y scan to account for VRAM byte swapping Michael Pavone <pavone@retrodev.com> parents: 1137 diff changeset	1029 y = context->vdpmem[sat_address];
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	1030 if (y == 0xd0) {
1122 d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	1031 context->sprite_index = MAX_SPRITES_FRAME_H32;
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	1032 return;
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	1033 } else {
2511 e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2510 diff changeset	1034 if (y > context->inactive_start) {
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2510 diff changeset	1035 y -= 0x100;
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2510 diff changeset	1036 }
2204 dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	1037 if (y <= line && line < (y + ysize)) {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	1038 if (!context->slot_counter) {
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	1039 context->sprite_index = MAX_SPRITES_FRAME_H32;
2574 0da40b1978fd Sprite overflow flag should only be set when there are too many sprites in a line and not when there are just too many sprite pixels. Fixes regression in Madou Monogatari I Michael Pavone <pavone@retrodev.com> parents: 2572 diff changeset	1040 context->flags \|= FLAG_SPRITE_OFLOW;
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	1041 return;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	1042 }
1122 d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	1043 context->sprite_info_list[--(context->slot_counter)].size = size;
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	1044 context->sprite_info_list[context->slot_counter].index = context->sprite_index;
1358 3716b90d3470 Fix regression in Mode 4 sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1357 diff changeset	1045 context->sprite_info_list[context->slot_counter].y = y;
1122 d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	1046 }
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	1047 context->sprite_index++;
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	1048 }
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	1049 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1050
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1051 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1052 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1053
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1054 static void read_sprite_x(uint32_t line, vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1055 {
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	1056 if (context->cur_slot == context->max_sprites_line) {
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	1057 context->cur_slot = 0;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	1058 }
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	1059 if (context->cur_slot < context->slot_counter) {
34 0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	1060 if (context->sprite_draws) {
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	1061 line += 1;
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	1062 //in tiles
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	1063 uint8_t width = ((context->sprite_info_list[context->cur_slot].size >> 2) & 0x3) + 1;
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	1064 //in pixels
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	1065 uint8_t height = ((context->sprite_info_list[context->cur_slot].size & 0x3) + 1) * 8;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1066 if (context->double_res) {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1067 line *= 2;
1077 1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode. Michael Pavone <pavone@retrodev.com> parents: 1076 diff changeset	1068 if (context->flags2 & FLAG2_EVEN_FIELD) {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1069 line++;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1070 }
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1071 height *= 2;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1072 }
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	1073 uint16_t ymask, ymin;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	1074 if (context->double_res) {
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	1075 ymask = 0x3FF;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	1076 ymin = 256;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	1077 } else {
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	1078 ymask = 0x1FF;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	1079 ymin = 128;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	1080 }
2230 3888c7ed4e36 Fix handling of sprite indices >= 64 in H32 mode Michael Pavone <pavone@retrodev.com> parents: 2227 diff changeset	1081 uint8_t index = context->sprite_info_list[context->cur_slot].index;
3888c7ed4e36 Fix handling of sprite indices >= 64 in H32 mode Michael Pavone <pavone@retrodev.com> parents: 2227 diff changeset	1082 if (!(context->regs[REG_MODE_4] & BIT_H40)) {
3888c7ed4e36 Fix handling of sprite indices >= 64 in H32 mode Michael Pavone <pavone@retrodev.com> parents: 2227 diff changeset	1083 index &= MAX_SPRITES_FRAME_H32 - 1;
3888c7ed4e36 Fix handling of sprite indices >= 64 in H32 mode Michael Pavone <pavone@retrodev.com> parents: 2227 diff changeset	1084 }
3888c7ed4e36 Fix handling of sprite indices >= 64 in H32 mode Michael Pavone <pavone@retrodev.com> parents: 2227 diff changeset	1085 uint16_t att_addr = mode5_sat_address(context) + index * 8 + 4;
450 3758bcdae5de Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty Mike Pavone <pavone@retrodev.com> parents: 438 diff changeset	1086 uint16_t tileinfo = (context->vdpmem[att_addr] << 8) \| context->vdpmem[att_addr+1];
34 0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	1087 uint8_t pal_priority = (tileinfo >> 9) & 0x70;
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	1088 uint8_t row;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	1089 uint16_t cache_addr = context->sprite_info_list[context->cur_slot].index * 4;
1346 f7ca42e020fd Fix sprite rendering in double resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 1344 diff changeset	1090 line = (line + ymin) & ymask;
1338 3706b683cd48 Fix sprite rendering for negative line. Fixes remaining visual glitch in the Titancade scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1337 diff changeset	1091 int16_t y = ((context->sat_cache[cache_addr] << 8 \| context->sat_cache[cache_addr+1]) & ymask)/* - ymin*/;
34 0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	1092 if (tileinfo & MAP_BIT_V_FLIP) {
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	1093 row = (y + height - 1) - line;
34 0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	1094 } else {
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	1095 row = line-y;
34 0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	1096 }
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	1097 row &= ymask >> 4;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1098 uint16_t address;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1099 if (context->double_res) {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1100 address = ((tileinfo & 0x3FF) << 6) + row * 4;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1101 } else {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1102 address = ((tileinfo & 0x7FF) << 5) + row * 4;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1103 }
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	1104 context->sprite_draws--;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	1105 context->sprite_draw_list[context->sprite_draws].x_pos = ((context->vdpmem[att_addr+ 2] & 0x3) << 8 \| context->vdpmem[att_addr + 3]) & 0x1FF;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	1106 context->sprite_draw_list[context->sprite_draws].address = address;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	1107 context->sprite_draw_list[context->sprite_draws].pal_priority = pal_priority;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	1108 context->sprite_draw_list[context->sprite_draws].h_flip = (tileinfo & MAP_BIT_H_FLIP) ? 1 : 0;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	1109 context->sprite_draw_list[context->sprite_draws].width = width;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	1110 context->sprite_draw_list[context->sprite_draws].height = height;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1111 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1112 }
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	1113 context->cur_slot++;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1114 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1115
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	1116 static void read_sprite_x_mode4(vdp_context * context)
427 2802318c14e1 Refactor duplicated CRAM writing code and fix a bug in the process Mike Pavone <pavone@retrodev.com> parents: 426 diff changeset	1117 {
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1118 if (context->cur_slot >= context->slot_counter) {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	1119 uint32_t address = (context->regs[REG_SAT] << 7 & 0x3F00) + 0x80 + context->sprite_info_list[context->cur_slot].index * 2;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	1120 address = mode4_address_map[address];
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	1121 --context->sprite_draws;
2204 dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	1122 uint8_t zoom = context->type != VDP_GENESIS && (context->regs[REG_MODE_2] & BIT_SPRITE_ZM);
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	1123 uint32_t tile_address = context->vdpmem[address] * 32 + (context->regs[REG_STILE_BASE] << 11 & 0x2000);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	1124 if (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) {
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	1125 tile_address &= ~32;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1126 }
2511 e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2510 diff changeset	1127 int16_t line = context->vcounter & 0xFF;
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2510 diff changeset	1128 if (context->vcounter > context->inactive_start) {
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2510 diff changeset	1129 line -= 0x100;
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2510 diff changeset	1130 }
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2510 diff changeset	1131 uint16_t y_diff = line - context->sprite_info_list[context->cur_slot].y;
2204 dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	1132 if (zoom) {
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	1133 y_diff >>= 1;
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	1134 }
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	1135 tile_address += y_diff * 4;
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	1136 context->sprite_draw_list[context->sprite_draws].x_pos = context->vdpmem[address + 1];
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	1137 context->sprite_draw_list[context->sprite_draws].address = tile_address;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	1138 context->cur_slot--;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1139 }
427 2802318c14e1 Refactor duplicated CRAM writing code and fix a bug in the process Mike Pavone <pavone@retrodev.com> parents: 426 diff changeset	1140 }
2802318c14e1 Refactor duplicated CRAM writing code and fix a bug in the process Mike Pavone <pavone@retrodev.com> parents: 426 diff changeset	1141
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1142 static void vdp_advance_dma(vdp_context * context)
984 bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1143 {
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1144 context->regs[REG_DMASRC_L] += 1;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1145 if (!context->regs[REG_DMASRC_L]) {
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1146 context->regs[REG_DMASRC_M] += 1;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1147 }
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1148 context->address += context->regs[REG_AUTOINC];
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1149 uint16_t dma_len = ((context->regs[REG_DMALEN_H] << 8) \| context->regs[REG_DMALEN_L]) - 1;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1150 context->regs[REG_DMALEN_H] = dma_len >> 8;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1151 context->regs[REG_DMALEN_L] = dma_len;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1152 if (!dma_len) {
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1153 context->flags &= ~FLAG_DMA_RUN;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1154 context->cd &= 0xF;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1155 }
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1156 }
1019 e34334e6c682 Fix GST savestate loading to deal with SAT cache to fix sprite corruption on savestate load. Clear out Z80 native_pc so the Z80 state does not get hosed when loading a savestate while the emulator is already running Michael Pavone <pavone@retrodev.com> parents: 1001 diff changeset	1157
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1158 #define DMA_FILL 0x80
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1159 #define DMA_COPY 0xC0
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1160 #define DMA_TYPE_MASK 0xC0
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1161 static void external_slot(vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1162 {
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1163 if ((context->flags & FLAG_DMA_RUN) && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL && context->fifo_read < 0) {
984 bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1164 context->fifo_read = (context->fifo_write-1) & (FIFO_SIZE-1);
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1165 fifo_entry * cur = context->fifo + context->fifo_read;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1166 cur->cycle = context->cycles;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1167 cur->address = context->address;
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1168 cur->partial = 1;
984 bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1169 vdp_advance_dma(context);
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1170 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	1171 fifo_entry * start = context->fifo + context->fifo_read;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	1172 if (context->fifo_read >= 0 && start->cycle <= context->cycles) {
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1173 switch (start->cd & 0xF)
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1174 {
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1175 case VRAM_WRITE:
1319 b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache Michael Pavone <pavone@retrodev.com> parents: 1318 diff changeset	1176 if ((context->regs[REG_MODE_2] & (BIT_128K_VRAM\|BIT_MODE_5)) == (BIT_128K_VRAM\|BIT_MODE_5)) {
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	1177 event_vram_word(context->cycles, start->address, start->value);
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1178 vdp_check_update_sat(context, start->address, start->value);
1319 b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache Michael Pavone <pavone@retrodev.com> parents: 1318 diff changeset	1179 write_vram_word(context, start->address, start->value);
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1180 } else {
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1181 uint8_t byte = start->partial == 1 ? start->value >> 8 : start->value;
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	1182 uint32_t address = start->address ^ 1;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	1183 event_vram_byte(context->cycles, start->address, byte, context->regs[REG_AUTOINC]);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	1184 vdp_check_update_sat_byte(context, address, byte);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	1185 write_vram_byte(context, address, byte);
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1186 if (!start->partial) {
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	1187 start->address = address;
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1188 start->partial = 1;
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1189 //skip auto-increment and removal of entry from fifo
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1190 return;
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1191 }
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1192 }
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1193 break;
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1194 case CRAM_WRITE: {
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1195 //printf("CRAM Write \| %X to %X\n", start->value, (start->address/2) & (CRAM_SIZE-1));
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	1196 uint16_t val;
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1197 if (start->partial == 3) {
2194 01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	1198 if (context->type == VDP_GAMEGEAR) {
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	1199 if (start->address & 1) {
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	1200 val = start->value << 8 \| context->cram_latch;
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	1201 } else {
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	1202 context->cram_latch = start->value;
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	1203 break;
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	1204 }
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	1205 } else if ((start->address & 1) && (context->regs[REG_MODE_2] & BIT_MODE_5)) {
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1206 val = (context->cram[start->address >> 1 & (CRAM_SIZE-1)] & 0xFF) \| start->value << 8;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1207 } else {
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1208 uint16_t address = (context->regs[REG_MODE_2] & BIT_MODE_5) ? start->address >> 1 & (CRAM_SIZE-1) : start->address & 0x1F;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1209 val = (context->cram[address] & 0xFF00) \| start->value;
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1210 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1211 } else {
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	1212 val = start->partial ? context->fifo[context->fifo_write].value : start->value;
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1213 }
1956 275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	1214 uint8_t buffer[3] = {start->address & 127, val >> 8, val};
275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	1215 event_log(EVENT_VDP_INTRAM, context->cycles, sizeof(buffer), buffer);
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	1216 write_cram(context, start->address, val);
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1217 break;
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1218 }
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1219 case VSRAM_WRITE:
1906 2d462aa78349 Make VDP VSRAM capacity respect model selection Michael Pavone <pavone@retrodev.com> parents: 1899 diff changeset	1220 if (((start->address/2) & 63) < context->vsram_size) {
1432 5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	1221 //printf("VSRAM Write: %X to %X @ frame: %d, vcounter: %d, hslot: %d, cycle: %d\n", start->value, start->address, context->frame, context->vcounter, context->hslot, context->cycles);
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1222 if (start->partial == 3) {
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1223 if (start->address & 1) {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1224 context->vsram[(start->address/2) & 63] &= 0xFF;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1225 context->vsram[(start->address/2) & 63] \|= start->value << 8;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1226 } else {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1227 context->vsram[(start->address/2) & 63] &= 0xFF00;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1228 context->vsram[(start->address/2) & 63] \|= start->value;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1229 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1230 } else {
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1231 context->vsram[(start->address/2) & 63] = start->partial ? context->fifo[context->fifo_write].value : start->value;
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1232 }
1956 275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	1233 uint8_t buffer[3] = {((start->address/2) & 63) + 128, context->vsram[(start->address/2) & 63] >> 8, context->vsram[(start->address/2) & 63]};
275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	1234 event_log(EVENT_VDP_INTRAM, context->cycles, sizeof(buffer), buffer);
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1235 }
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1236
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1237 break;
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	1238 default:
2334 57ebbc1ade30 Fix regression in mega-color image demos Michael Pavone <pavone@retrodev.com> parents: 2283 diff changeset	1239 if (!(context->cd & 6) && !start->partial && (context->regs[REG_MODE_2] & (BIT_128K_VRAM\|BIT_MODE_5)) != (BIT_128K_VRAM\|BIT_MODE_5)) {
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	1240 start->partial = 1;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	1241 return;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	1242 }
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1243 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	1244 context->fifo_read = (context->fifo_read+1) & (FIFO_SIZE-1);
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	1245 if (context->fifo_read == context->fifo_write) {
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1246 if ((context->cd & 0x20) && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL) {
983 14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing. Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	1247 context->flags \|= FLAG_DMA_RUN;
2361 3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	1248 if (context->dma_hook) {
3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	1249 context->dma_hook(context);
3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	1250 }
983 14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing. Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	1251 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	1252 context->fifo_read = -1;
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1253 }
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1254 } else if ((context->flags & FLAG_DMA_RUN) && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_COPY) {
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1255 if (context->flags & FLAG_READ_FETCHED) {
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	1256 write_vram_byte(context, context->address ^ 1, context->prefetch);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1257
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1258 //Update DMA state
984 bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1259 vdp_advance_dma(context);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1260
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1261 context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1262 } else {
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1263 context->prefetch = context->vdpmem[(context->regs[REG_DMASRC_M] << 8) \| context->regs[REG_DMASRC_L] ^ 1];
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1264
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1265 context->flags \|= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1266 }
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	1267 } else if (!(context->cd & 1) && !(context->flags & (FLAG_READ_FETCHED\|FLAG_PENDING)) && context->read_latency <= context->cycles) {
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1268 switch(context->cd & 0xF)
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1269 {
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1270 case VRAM_READ:
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1271 if (context->flags2 & FLAG2_READ_PENDING) {
2283 6f6f21d0c396 Fix missing address masks on some VRAM reads Michael Pavone <pavone@retrodev.com> parents: 2264 diff changeset	1272 //TODO: 128K VRAM support
6f6f21d0c396 Fix missing address masks on some VRAM reads Michael Pavone <pavone@retrodev.com> parents: 2264 diff changeset	1273 context->prefetch \|= context->vdpmem[(context->address & 0xFFFE) \| 1];
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1274 context->flags \|= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1275 context->flags2 &= ~FLAG2_READ_PENDING;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1276 //Should this happen after the prefetch or after the read?
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	1277 increment_address(context);
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1278 } else {
2283 6f6f21d0c396 Fix missing address masks on some VRAM reads Michael Pavone <pavone@retrodev.com> parents: 2264 diff changeset	1279 //TODO: 128K VRAM support
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1280 context->prefetch = context->vdpmem[context->address & 0xFFFE] << 8;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1281 context->flags2 \|= FLAG2_READ_PENDING;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1282 }
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1283 break;
1151 681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	1284 case VRAM_READ8: {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	1285 uint32_t address = context->address ^ 1;
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	1286 if (!(context->regs[REG_MODE_2] & BIT_MODE_5)) {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	1287 address = mode4_address_map[address & 0x3FFF];
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	1288 }
2283 6f6f21d0c396 Fix missing address masks on some VRAM reads Michael Pavone <pavone@retrodev.com> parents: 2264 diff changeset	1289 //TODO: 128K VRAM support
2338 bc17ece8dd00 Fix silly regression in SMS mode Michael Pavone <pavone@retrodev.com> parents: 2337 diff changeset	1290 context->prefetch = context->vdpmem[address & 0xFFFF];
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1291 context->prefetch \|= context->fifo[context->fifo_write].value & 0xFF00;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1292 context->flags \|= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1293 //Should this happen after the prefetch or after the read?
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	1294 increment_address(context);
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1295 break;
1151 681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	1296 }
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1297 case CRAM_READ:
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1298 context->prefetch = context->cram[(context->address/2) & (CRAM_SIZE-1)] & CRAM_BITS;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1299 context->prefetch \|= context->fifo[context->fifo_write].value & ~CRAM_BITS;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1300 context->flags \|= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1301 //Should this happen after the prefetch or after the read?
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	1302 increment_address(context);
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1303 break;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1304 case VSRAM_READ: {
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1305 uint16_t address = (context->address /2) & 63;
1906 2d462aa78349 Make VDP VSRAM capacity respect model selection Michael Pavone <pavone@retrodev.com> parents: 1899 diff changeset	1306 if (address >= context->vsram_size) {
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1307 address = 0;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1308 }
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1309 context->prefetch = context->vsram[address] & VSRAM_BITS;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1310 context->prefetch \|= context->fifo[context->fifo_write].value & VSRAM_DIRTY_BITS;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1311 context->flags \|= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1312 //Should this happen after the prefetch or after the read?
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	1313 increment_address(context);
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1314 break;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1315 }
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1316 }
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1317 }
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1318 }
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1319
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1320 static void run_dma_src(vdp_context * context, int32_t slot)
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1321 {
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	1322 //TODO: Figure out what happens if CD bit 4 is not set in DMA copy mode
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	1323 //TODO: Figure out what happens when CD:0-3 is not set to a write mode in DMA operations
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	1324 if (context->fifo_write == context->fifo_read) {
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1325 return;
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1326 }
478 2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1327 fifo_entry * cur = NULL;
984 bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1328 if (!(context->regs[REG_DMASRC_H] & 0x80))
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1329 {
984 bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1330 //68K -> VDP
924 1b86268a4cb3 Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period Michael Pavone <pavone@retrodev.com> parents: 923 diff changeset	1331 if (slot == -1 \|\| !is_refresh(context, slot-1)) {
478 2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1332 cur = context->fifo + context->fifo_write;
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	1333 cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY;
478 2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1334 cur->address = context->address;
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1335 cur->value = read_dma_value((context->regs[REG_DMASRC_H] << 16) \| (context->regs[REG_DMASRC_M] << 8) \| context->regs[REG_DMASRC_L]);
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1336 cur->cd = context->cd;
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1337 cur->partial = 0;
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1338 if (context->fifo_read < 0) {
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1339 context->fifo_read = context->fifo_write;
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1340 }
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1341 context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1);
984 bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1342 vdp_advance_dma(context);
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	1343 }
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	1344 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1345 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1346
40 7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1347 #define WINDOW_RIGHT 0x80
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1348 #define WINDOW_DOWN 0x80
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1349
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1350 static void read_map_scroll(uint16_t column, uint16_t vsram_off, uint32_t line, uint16_t address, uint16_t hscroll_val, vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1351 {
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1352 uint16_t window_line_shift, v_offset_mask, vscroll_shift;
414 51ee0f117365 Fix vscroll calculation in double resultion interlace mode Mike Pavone <pavone@retrodev.com> parents: 413 diff changeset	1353 if (context->double_res) {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1354 line *= 2;
1077 1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode. Michael Pavone <pavone@retrodev.com> parents: 1076 diff changeset	1355 if (context->flags2 & FLAG2_EVEN_FIELD) {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1356 line++;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1357 }
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1358 window_line_shift = 4;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1359 v_offset_mask = 0xF;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1360 vscroll_shift = 4;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1361 } else {
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1362 window_line_shift = 3;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1363 v_offset_mask = 0x7;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1364 vscroll_shift = 3;
414 51ee0f117365 Fix vscroll calculation in double resultion interlace mode Mike Pavone <pavone@retrodev.com> parents: 413 diff changeset	1365 }
2337 0e3118325c1c Fix first column bug behavior Michael Pavone <pavone@retrodev.com> parents: 2336 diff changeset	1366 //TODO: Further research on vscroll latch behavior
1422 2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	1367 if (context->regs[REG_MODE_3] & BIT_VSCROLL) {
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	1368 if (!column) {
1344 6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1369 if (context->regs[REG_MODE_4] & BIT_H40) {
2337 0e3118325c1c Fix first column bug behavior Michael Pavone <pavone@retrodev.com> parents: 2336 diff changeset	1370 //Pre MD2VA4, behavior seems to vary from console to console
0e3118325c1c Fix first column bug behavior Michael Pavone <pavone@retrodev.com> parents: 2336 diff changeset	1371 //On some consoles it's a stable AND, on some it's always zero and others it's an "unstable" AND
0e3118325c1c Fix first column bug behavior Michael Pavone <pavone@retrodev.com> parents: 2336 diff changeset	1372 if (context->vsram_size == MIN_VSRAM_SIZE) {
0e3118325c1c Fix first column bug behavior Michael Pavone <pavone@retrodev.com> parents: 2336 diff changeset	1373 // For now just implement the AND behavior
0e3118325c1c Fix first column bug behavior Michael Pavone <pavone@retrodev.com> parents: 2336 diff changeset	1374 if (!vsram_off) {
0e3118325c1c Fix first column bug behavior Michael Pavone <pavone@retrodev.com> parents: 2336 diff changeset	1375 context->vscroll_latch[0] &= context->vscroll_latch[1];
0e3118325c1c Fix first column bug behavior Michael Pavone <pavone@retrodev.com> parents: 2336 diff changeset	1376 context->vscroll_latch[1] = context->vscroll_latch[0];
0e3118325c1c Fix first column bug behavior Michael Pavone <pavone@retrodev.com> parents: 2336 diff changeset	1377 }
0e3118325c1c Fix first column bug behavior Michael Pavone <pavone@retrodev.com> parents: 2336 diff changeset	1378 } else {
0e3118325c1c Fix first column bug behavior Michael Pavone <pavone@retrodev.com> parents: 2336 diff changeset	1379 //MD2VA4 and later use the column 0 value
0e3118325c1c Fix first column bug behavior Michael Pavone <pavone@retrodev.com> parents: 2336 diff changeset	1380 context->vscroll_latch[vsram_off] = context->vsram[vsram_off];
1344 6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1381 }
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1382 } else {
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1383 //supposedly it's always forced to 0 in the H32 case
2337 0e3118325c1c Fix first column bug behavior Michael Pavone <pavone@retrodev.com> parents: 2336 diff changeset	1384 //TODO: repeat H40 tests in H32 mode to confirm
1344 6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1385 context->vscroll_latch[0] = context->vscroll_latch[1] = 0;
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1386 }
1422 2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	1387 } else if (context->regs[REG_MODE_3] & BIT_VSCROLL) {
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	1388 context->vscroll_latch[vsram_off] = context->vsram[column - 2 + vsram_off];
1344 6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1389 }
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1390 }
40 7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1391 if (!vsram_off) {
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1392 uint16_t left_col, right_col;
2557 75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker Michael Pavone <pavone@retrodev.com> parents: 2513 diff changeset	1393 if (context->window_h_latch & WINDOW_RIGHT) {
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker Michael Pavone <pavone@retrodev.com> parents: 2513 diff changeset	1394 left_col = (context->window_h_latch & 0x1F) * 2 + 2;
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1395 right_col = 42;
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1396 } else {
40 7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1397 left_col = 0;
2557 75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker Michael Pavone <pavone@retrodev.com> parents: 2513 diff changeset	1398 right_col = (context->window_h_latch & 0x1F) * 2;
40 7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1399 if (right_col) {
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1400 right_col += 2;
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1401 }
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1402 }
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1403 uint16_t top_line, bottom_line;
2557 75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker Michael Pavone <pavone@retrodev.com> parents: 2513 diff changeset	1404 if (context->window_v_latch & WINDOW_DOWN) {
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker Michael Pavone <pavone@retrodev.com> parents: 2513 diff changeset	1405 top_line = (context->window_v_latch & 0x1F) << window_line_shift;
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1406 bottom_line = context->double_res ? 481 : 241;
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1407 } else {
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1408 top_line = 0;
2557 75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker Michael Pavone <pavone@retrodev.com> parents: 2513 diff changeset	1409 bottom_line = (context->window_v_latch & 0x1F) << window_line_shift;
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1410 }
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1411 if ((column >= left_col && column < right_col) \|\| (line >= top_line && line < bottom_line)) {
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1412 uint16_t address = context->regs[REG_WINDOW] << 10;
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1413 uint16_t line_offset, offset, mask;
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	1414 if (context->regs[REG_MODE_4] & BIT_H40) {
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1415 address &= 0xF000;
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1416 line_offset = (((line) >> vscroll_shift) * 64 * 2) & 0xFFF;
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1417 mask = 0x7F;
450 3758bcdae5de Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty Mike Pavone <pavone@retrodev.com> parents: 438 diff changeset	1418
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1419 } else {
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1420 address &= 0xF800;
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1421 line_offset = (((line) >> vscroll_shift) * 32 * 2) & 0xFFF;
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1422 mask = 0x3F;
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1423 }
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1424 if (context->double_res) {
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1425 mask <<= 1;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1426 mask \|= 1;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1427 }
42 6653e67a6811 Fix bug in tile address masking. Remove some debug code from window plane. Mike Pavone <pavone@retrodev.com> parents: 41 diff changeset	1428 offset = address + line_offset + (((column - 2) * 2) & mask);
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1429 context->col_1 = (context->vdpmem[offset] << 8) \| context->vdpmem[offset+1];
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	1430 //printf("Window \| top: %d, bot: %d, left: %d, right: %d, base: %X, line: %X offset: %X, tile: %X, reg: %X\n", top_line, bottom_line, left_col, right_col, address, line_offset, offset, ((context->col_1 & 0x3FF) << 5), context->regs[REG_WINDOW]);
42 6653e67a6811 Fix bug in tile address masking. Remove some debug code from window plane. Mike Pavone <pavone@retrodev.com> parents: 41 diff changeset	1431 offset = address + line_offset + (((column - 1) * 2) & mask);
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1432 context->col_2 = (context->vdpmem[offset] << 8) \| context->vdpmem[offset+1];
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1433 context->v_offset = (line) & v_offset_mask;
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1434 context->flags \|= FLAG_WINDOW;
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1435 return;
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1436 } else if (column == right_col) {
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1437 context->flags \|= FLAG_WINDOW_EDGE;
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1438 context->flags &= ~FLAG_WINDOW;
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1439 } else {
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1440 context->flags &= ~(FLAG_WINDOW_EDGE\|FLAG_WINDOW);
40 7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1441 }
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1442 }
1290 aa1a8eb5bb2b Change handling of invalid scroll plane sizes. Fixes title and high score screens in The Incredible Hulk Michael Pavone <pavone@retrodev.com> parents: 1289 diff changeset	1443 //TODO: Verify behavior for 0x20 case
aa1a8eb5bb2b Change handling of invalid scroll plane sizes. Fixes title and high score screens in The Incredible Hulk Michael Pavone <pavone@retrodev.com> parents: 1289 diff changeset	1444 uint16_t vscroll = 0xFF \| (context->regs[REG_SCROLL] & 0x30) << 4;
414 51ee0f117365 Fix vscroll calculation in double resultion interlace mode Mike Pavone <pavone@retrodev.com> parents: 413 diff changeset	1445 if (context->double_res) {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1446 vscroll <<= 1;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1447 vscroll \|= 1;
414 51ee0f117365 Fix vscroll calculation in double resultion interlace mode Mike Pavone <pavone@retrodev.com> parents: 413 diff changeset	1448 }
710 4cd8823f79e3 First pass at emulating a vscroll latch. Titan's Overdrive demo seems to depend on the scroll value being latched early in the line before the HINT gets a chance to change it Michael Pavone <pavone@retrodev.com> parents: 708 diff changeset	1449 vscroll &= context->vscroll_latch[vsram_off] + line;
414 51ee0f117365 Fix vscroll calculation in double resultion interlace mode Mike Pavone <pavone@retrodev.com> parents: 413 diff changeset	1450 context->v_offset = vscroll & v_offset_mask;
26 a7c2b92d8056 Fix management of context->sprite_draws so the sprite layer only draws when it should Mike Pavone <pavone@retrodev.com> parents: 25 diff changeset	1451 //printf("%s \| line %d, vsram: %d, vscroll: %d, v_offset: %d\n",(vsram_off ? "B" : "A"), line, context->vsram[context->regs[REG_MODE_3] & 0x4 ? column : 0], vscroll, context->v_offset);
414 51ee0f117365 Fix vscroll calculation in double resultion interlace mode Mike Pavone <pavone@retrodev.com> parents: 413 diff changeset	1452 vscroll >>= vscroll_shift;
1887 bb3edb4ec605 Small optimization to read_map_scroll Michael Pavone <pavone@retrodev.com> parents: 1886 diff changeset	1453 //TODO: Verify the behavior for a setting of 2
bb3edb4ec605 Small optimization to read_map_scroll Michael Pavone <pavone@retrodev.com> parents: 1886 diff changeset	1454 static const uint16_t hscroll_masks[] = {0x1F, 0x3F, 0x1F, 0x7F};
2013 dcdad92f84a4 Multiplying by zero and shifting by zero are very different. Fixes regression in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 2010 diff changeset	1455 static const uint16_t v_shifts[] = {6, 7, 16, 8};
1887 bb3edb4ec605 Small optimization to read_map_scroll Michael Pavone <pavone@retrodev.com> parents: 1886 diff changeset	1456 uint16_t hscroll_mask = hscroll_masks[context->regs[REG_SCROLL] & 0x3];
bb3edb4ec605 Small optimization to read_map_scroll Michael Pavone <pavone@retrodev.com> parents: 1886 diff changeset	1457 uint16_t v_shift = v_shifts[context->regs[REG_SCROLL] & 0x3];
28 037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1458 uint16_t hscroll, offset;
037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1459 for (int i = 0; i < 2; i++) {
39 3c69319269ef Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should Mike Pavone <pavone@retrodev.com> parents: 38 diff changeset	1460 hscroll = (column - 2 + i - ((hscroll_val/8) & 0xFFFE)) & hscroll_mask;
1887 bb3edb4ec605 Small optimization to read_map_scroll Michael Pavone <pavone@retrodev.com> parents: 1886 diff changeset	1461 offset = address + (((vscroll << v_shift) + hscroll*2) & 0x1FFF);
39 3c69319269ef Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should Mike Pavone <pavone@retrodev.com> parents: 38 diff changeset	1462 //printf("%s \| line: %d, col: %d, x: %d, hs_mask %X, scr reg: %X, tbl addr: %X\n", (vsram_off ? "B" : "A"), line, (column-2+i), hscroll, hscroll_mask, context->regs[REG_SCROLL], offset);
28 037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1463 uint16_t col_val = (context->vdpmem[offset] << 8) \| context->vdpmem[offset+1];
037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1464 if (i) {
037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1465 context->col_2 = col_val;
037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1466 } else {
037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1467 context->col_1 = col_val;
037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1468 }
037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1469 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1470 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1471
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1472 static void read_map_scroll_a(uint16_t column, uint32_t line, vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1473 {
25 4d0c20ad815a Fix vertical scroll value for plane B Mike Pavone <pavone@retrodev.com> parents: 24 diff changeset	1474 read_map_scroll(column, 0, line, (context->regs[REG_SCROLL_A] & 0x38) << 10, context->hscroll_a, context);
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1475 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1476
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1477 static void read_map_scroll_b(uint16_t column, uint32_t line, vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1478 {
25 4d0c20ad815a Fix vertical scroll value for plane B Mike Pavone <pavone@retrodev.com> parents: 24 diff changeset	1479 read_map_scroll(column, 1, line, (context->regs[REG_SCROLL_B] & 0x7) << 13, context->hscroll_b, context);
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1480 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1481
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1482 static void read_map_mode4(uint16_t column, uint32_t line, vdp_context * context)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1483 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1484 uint32_t address = (context->regs[REG_SCROLL_A] & 0xE) << 10;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1485 //add row
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1486 uint32_t vscroll = line;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1487 if (column < 24 \|\| !(context->regs[REG_MODE_1] & BIT_VSCRL_LOCK)) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1488 vscroll += context->regs[REG_Y_SCROLL];
2465 b0408f38f464 Add missing mask to vscroll calculation in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2414 diff changeset	1489 vscroll &= 511;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1490 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1491 if (vscroll > 223) {
2465 b0408f38f464 Add missing mask to vscroll calculation in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2414 diff changeset	1492 //TODO: support V28 and V30 for SMS2/GG VDPs
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1493 vscroll -= 224;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1494 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1495 address += (vscroll >> 3) * 2 * 32;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1496 //add column
1136 52f25c41abdd Fix horizontal scrolling in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1135 diff changeset	1497 address += ((column - (context->hscroll_a >> 3)) & 31) * 2;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1498 //adjust for weird VRAM mapping in Mode 4
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1499 address = mode4_address_map[address];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1500 context->col_1 = (context->vdpmem[address] << 8) \| context->vdpmem[address+1];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1501 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1502
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1503 static void render_map(uint16_t col, uint8_t * tmp_buf, uint8_t offset, vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1504 {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1505 uint16_t address;
1032 679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 1029 diff changeset	1506 uint16_t vflip_base;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1507 if (context->double_res) {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1508 address = ((col & 0x3FF) << 6);
1032 679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 1029 diff changeset	1509 vflip_base = 60;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1510 } else {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1511 address = ((col & 0x7FF) << 5);
1032 679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 1029 diff changeset	1512 vflip_base = 28;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1513 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1514 if (col & MAP_BIT_V_FLIP) {
1032 679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 1029 diff changeset	1515 address += vflip_base - 4 * context->v_offset;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1516 } else {
1032 679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 1029 diff changeset	1517 address += 4 * context->v_offset;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1518 }
1653 858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1519 uint8_t pal_priority = (col >> 9) & 0x70;
858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1520 uint32_t bits = ((uint32_t )(&context->vdpmem[address]));
1875 3457d338ae25 Small optimization to render_map in VDP code Michael Pavone <pavone@retrodev.com> parents: 1874 diff changeset	1521 tmp_buf += offset;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1522 if (col & MAP_BIT_H_FLIP) {
1653 858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1523 uint32_t shift = 28;
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1524 for (int i = 0; i < 4; i++)
1653 858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1525 {
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1526 uint8_t right = pal_priority \| ((bits >> shift) & 0xF);
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1527 shift -= 4;
1875 3457d338ae25 Small optimization to render_map in VDP code Michael Pavone <pavone@retrodev.com> parents: 1874 diff changeset	1528 *(tmp_buf++) = pal_priority \| ((bits >> shift) & 0xF);
1653 858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1529 shift -= 4;
1875 3457d338ae25 Small optimization to render_map in VDP code Michael Pavone <pavone@retrodev.com> parents: 1874 diff changeset	1530 *(tmp_buf++) = right;
1653 858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1531 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1532 } else {
1653 858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1533 for (int i = 0; i < 4; i++)
858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1534 {
858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1535 uint8_t right = pal_priority \| (bits & 0xF);
858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1536 bits >>= 4;
1875 3457d338ae25 Small optimization to render_map in VDP code Michael Pavone <pavone@retrodev.com> parents: 1874 diff changeset	1537 *(tmp_buf++) = pal_priority \| (bits & 0xF);
1653 858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1538 bits >>= 4;
1875 3457d338ae25 Small optimization to render_map in VDP code Michael Pavone <pavone@retrodev.com> parents: 1874 diff changeset	1539 *(tmp_buf++) = right;
1653 858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1540 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1541 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1542 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1543
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1544 static void render_map_1(vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1545 {
436 e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1546 render_map(context->col_1, context->tmp_buf_a, context->buf_a_off, context);
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1547 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1548
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1549 static void render_map_2(vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1550 {
436 e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1551 render_map(context->col_2, context->tmp_buf_a, context->buf_a_off+8, context);
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1552 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1553
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1554 static void render_map_3(vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1555 {
436 e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1556 render_map(context->col_1, context->tmp_buf_b, context->buf_b_off, context);
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1557 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1558
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1559 static void fetch_map_mode4(uint16_t col, uint32_t line, vdp_context *context)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1560 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1561 //calculate pixel row to fetch
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1562 uint32_t vscroll = line;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1563 if (col < 24 \|\| !(context->regs[REG_MODE_1] & BIT_VSCRL_LOCK)) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1564 vscroll += context->regs[REG_Y_SCROLL];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1565 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1566 if (vscroll > 223) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1567 vscroll -= 224;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1568 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1569 vscroll &= 7;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1570 if (context->col_1 & 0x400) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1571 vscroll = 7 - vscroll;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1572 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1573
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1574 uint32_t address = mode4_address_map[((context->col_1 & 0x1FF) * 32) + vscroll * 4];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1575 context->fetch_tmp[0] = context->vdpmem[address];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1576 context->fetch_tmp[1] = context->vdpmem[address+1];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1577 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1578
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1579 static uint8_t composite_normal(vdp_context context, uint8_t debug_dst, uint8_t sprite, uint8_t plane_a, uint8_t plane_b, uint8_t bg_index)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1580 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1581 uint8_t pixel = bg_index;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1582 uint8_t src = DBG_SRC_BG;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1583 if (plane_b & 0xF) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1584 pixel = plane_b;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1585 src = DBG_SRC_B;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1586 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1587 if (plane_a & 0xF && (plane_a & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1588 pixel = plane_a;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1589 src = DBG_SRC_A;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1590 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1591 if (sprite & 0xF && (sprite & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1592 pixel = sprite;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1593 src = DBG_SRC_S;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1594 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1595 *debug_dst = src;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1596 return pixel;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1597 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1598 typedef struct {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1599 uint8_t index, intensity;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1600 } sh_pixel;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1601
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1602 static sh_pixel composite_highlight(vdp_context context, uint8_t debug_dst, uint8_t sprite, uint8_t plane_a, uint8_t plane_b, uint8_t bg_index)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1603 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1604 uint8_t pixel = bg_index;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1605 uint8_t src = DBG_SRC_BG;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1606 uint8_t intensity = 0;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1607 if (plane_b & 0xF) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1608 pixel = plane_b;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1609 src = DBG_SRC_B;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1610 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1611 intensity = plane_b & BUF_BIT_PRIORITY;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1612 if (plane_a & 0xF && (plane_a & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1613 pixel = plane_a;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1614 src = DBG_SRC_A;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1615 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1616 intensity \|= plane_a & BUF_BIT_PRIORITY;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1617 if (sprite & 0xF && (sprite & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1618 if ((sprite & 0x3F) == 0x3E) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1619 intensity += BUF_BIT_PRIORITY;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1620 } else if ((sprite & 0x3F) == 0x3F) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1621 intensity = 0;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1622 } else {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1623 pixel = sprite;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1624 src = DBG_SRC_S;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1625 if ((pixel & 0xF) == 0xE) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1626 intensity = BUF_BIT_PRIORITY;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1627 } else {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1628 intensity \|= pixel & BUF_BIT_PRIORITY;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1629 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1630 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1631 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1632 *debug_dst = src;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1633 return (sh_pixel){.index = pixel, .intensity = intensity};
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1634 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1635
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1636 static void render_normal(vdp_context context, int32_t col, uint8_t dst, uint8_t debug_dst, uint8_t buf_a, int plane_a_off, int plane_a_mask, int plane_b_off)
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1637 {
1878 881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1638 uint8_t sprite_buf = context->linebuf + col 8;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1639 if (!col && (context->regs[REG_MODE_1] & BIT_COL0_MASK)) {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1640 memset(dst, 0, 8);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1641 memset(debug_dst, DBG_SRC_BG, 8);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1642 dst += 8;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1643 debug_dst += 8;
1878 881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1644 sprite_buf += 8;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1645 plane_a_off += 8;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1646 plane_b_off += 8;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1647 for (int i = 0; i < 8; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i)
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1648 {
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1649 uint8_t sprite, plane_a, plane_b;
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1650 plane_a = buf_a[plane_a_off & plane_a_mask];
1878 881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1651 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK];
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1652 (dst++) = composite_normal(context, debug_dst, sprite_buf, plane_a, plane_b, context->regs[REG_BG_COLOR]) & 0x3F;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1653 debug_dst++;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1654 }
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1655 } else {
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1656 for (int i = 0; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i)
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1657 {
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1658 uint8_t sprite, plane_a, plane_b;
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1659 plane_a = buf_a[plane_a_off & plane_a_mask];
1878 881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1660 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK];
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1661 (dst++) = composite_normal(context, debug_dst, sprite_buf, plane_a, plane_b, context->regs[REG_BG_COLOR]) & 0x3F;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1662 debug_dst++;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1663 }
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1664 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1665 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1666
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1667 static void render_highlight(vdp_context context, int32_t col, uint8_t dst, uint8_t debug_dst, uint8_t buf_a, int plane_a_off, int plane_a_mask, int plane_b_off)
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1668 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1669 int start = 0;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1670 if (!col && (context->regs[REG_MODE_1] & BIT_COL0_MASK)) {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1671 memset(dst, SHADOW_OFFSET + (context->regs[REG_BG_COLOR] & 0x3F), 8);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1672 memset(debug_dst, DBG_SRC_BG \| DBG_SHADOW, 8);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1673 dst += 8;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1674 debug_dst += 8;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1675 start = 8;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1676 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1677 uint8_t sprite_buf = context->linebuf + col 8 + start;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1678 for (int i = start; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1679 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1680 uint8_t sprite, plane_a, plane_b;
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1681 plane_a = buf_a[plane_a_off & plane_a_mask];
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1682 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK];
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1683 sprite = *sprite_buf;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1684 sh_pixel pixel = composite_highlight(context, debug_dst, sprite, plane_a, plane_b, context->regs[REG_BG_COLOR]);
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1685 uint8_t final_pixel;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1686 if (pixel.intensity == BUF_BIT_PRIORITY << 1) {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1687 final_pixel = (pixel.index & 0x3F) + HIGHLIGHT_OFFSET;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1688 } else if (pixel.intensity) {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1689 final_pixel = pixel.index & 0x3F;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1690 } else {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1691 final_pixel = (pixel.index & 0x3F) + SHADOW_OFFSET;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1692 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1693 debug_dst++;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1694 *(dst++) = final_pixel;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1695 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1696 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1697
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1698 static void render_testreg(vdp_context context, int32_t col, uint8_t dst, uint8_t debug_dst, uint8_t buf_a, int plane_a_off, int plane_a_mask, int plane_b_off, uint8_t output_disabled, uint8_t test_layer)
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1699 {
2508 caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!) Michael Pavone <pavone@retrodev.com> parents: 2504 diff changeset	1700 uint8_t pixel;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1701 if (output_disabled) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1702 switch (test_layer)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1703 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1704 case 0:
2508 caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!) Michael Pavone <pavone@retrodev.com> parents: 2504 diff changeset	1705 pixel = context->regs[REG_BG_COLOR] & 0x3F;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1706 for (int i = 0; i < 16; i++)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1707 {
2509 1102372feaee Remove old TODO Michael Pavone <pavone@retrodev.com> parents: 2508 diff changeset	1708 *(dst++) = pixel; //Behavior confirmed on hardware by vladikcomper
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1709 *(debug_dst++) = DBG_SRC_BG;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1710 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1711 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1712 case 1: {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1713 uint8_t sprite_buf = context->linebuf + col 8;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1714 for (int i = 0; i < 16; i++)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1715 {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1716 (dst++) = (sprite_buf++) & 0x3F;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1717 *(debug_dst++) = DBG_SRC_S;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1718 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1719 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1720 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1721 case 2:
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1722 for (int i = 0; i < 16; i++)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1723 {
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1724 *(dst++) = buf_a[(plane_a_off++) & plane_a_mask] & 0x3F;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1725 *(debug_dst++) = DBG_SRC_A;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1726 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1727 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1728 case 3:
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1729 for (int i = 0; i < 16; i++)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1730 {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1731 *(dst++) = context->tmp_buf_b[(plane_b_off++) & SCROLL_BUFFER_MASK] & 0x3F;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1732 *(debug_dst++) = DBG_SRC_B;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1733 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1734 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1735 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1736 } else {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1737 int start = 0;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1738 uint8_t sprite_buf = context->linebuf + col 8;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1739 if (!col && (context->regs[REG_MODE_1] & BIT_COL0_MASK)) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1740 //TODO: Confirm how test register interacts with column 0 blanking
2508 caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!) Michael Pavone <pavone@retrodev.com> parents: 2504 diff changeset	1741 pixel = 0x3F;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1742 uint8_t src = DBG_SRC_BG;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1743 for (int i = 0; i < 8; ++i)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1744 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1745 switch (test_layer)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1746 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1747 case 1:
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1748 pixel &= sprite_buf[i];
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1749 if (pixel) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1750 src = DBG_SRC_S;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1751 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1752 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1753 case 2:
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1754 pixel &= buf_a[(plane_a_off + i) & plane_a_mask];
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1755 if (pixel) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1756 src = DBG_SRC_A;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1757 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1758 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1759 case 3:
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1760 pixel &= context->tmp_buf_b[(plane_b_off + i) & SCROLL_BUFFER_MASK];
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1761 if (pixel) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1762 src = DBG_SRC_B;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1763 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1764 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1765 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1766
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1767 *(dst++) = pixel;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1768 *(debug_dst++) = src;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1769 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1770 plane_a_off += 8;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1771 plane_b_off += 8;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1772 sprite_buf += 8;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1773 start = 8;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1774 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1775 for (int i = start; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1776 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1777 uint8_t sprite, plane_a, plane_b;
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1778 plane_a = buf_a[plane_a_off & plane_a_mask];
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1779 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK];
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1780 sprite = *sprite_buf;
2508 caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!) Michael Pavone <pavone@retrodev.com> parents: 2504 diff changeset	1781 pixel = composite_normal(context, debug_dst, sprite, plane_a, plane_b, 0x3F) & 0x3F;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1782 switch (test_layer)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1783 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1784 case 1:
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1785 pixel &= sprite;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1786 if (pixel) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1787 *debug_dst = DBG_SRC_S;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1788 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1789 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1790 case 2:
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1791 pixel &= plane_a;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1792 if (pixel) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1793 *debug_dst = DBG_SRC_A;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1794 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1795 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1796 case 3:
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1797 pixel &= plane_b;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1798 if (pixel) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1799 *debug_dst = DBG_SRC_B;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1800 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1801 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1802 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1803 debug_dst++;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1804 *(dst++) = pixel;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1805 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1806 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1807 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1808
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1809 static void render_testreg_highlight(vdp_context context, int32_t col, uint8_t dst, uint8_t debug_dst, uint8_t buf_a, int plane_a_off, int plane_a_mask, int plane_b_off, uint8_t output_disabled, uint8_t test_layer)
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1810 {
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1811 int start = 0;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1812 uint8_t sprite_buf = context->linebuf + col 8;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1813 if (!col && (context->regs[REG_MODE_1] & BIT_COL0_MASK)) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1814 //TODO: Confirm how test register interacts with column 0 blanking
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1815 uint8_t pixel = 0x3F;
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1816 uint8_t src = DBG_SRC_BG \| DBG_SHADOW;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1817 for (int i = 0; i < 8; ++i)
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1818 {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1819 switch (test_layer)
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1820 {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1821 case 1:
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1822 pixel &= sprite_buf[i];
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1823 if (pixel) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1824 src = DBG_SRC_S \| DBG_SHADOW;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1825 }
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1826 break;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1827 case 2:
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1828 pixel &= buf_a[(plane_a_off + i) & plane_a_mask];
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1829 if (pixel) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1830 src = DBG_SRC_A \| DBG_SHADOW;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1831 }
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1832 break;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1833 case 3:
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1834 pixel &= context->tmp_buf_b[(plane_b_off + i) & SCROLL_BUFFER_MASK];
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1835 if (pixel) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1836 src = DBG_SRC_B \| DBG_SHADOW;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1837 }
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1838 break;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1839 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1840
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1841 *(dst++) = SHADOW_OFFSET + pixel;
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1842 *(debug_dst++) = src;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1843 }
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1844 plane_a_off += 8;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1845 plane_b_off += 8;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1846 sprite_buf += 8;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1847 start = 8;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1848 }
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1849 for (int i = start; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i)
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1850 {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1851 uint8_t sprite, plane_a, plane_b;
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1852 plane_a = buf_a[plane_a_off & plane_a_mask];
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1853 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK];
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1854 sprite = *sprite_buf;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1855 sh_pixel pixel = composite_highlight(context, debug_dst, sprite, plane_a, plane_b, 0x3F);
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1856 if (output_disabled) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1857 pixel.index = 0x3F;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1858 } else {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1859 pixel.index &= 0x3F;
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1860 }
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1861 switch (test_layer)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1862 {
2508 caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!) Michael Pavone <pavone@retrodev.com> parents: 2504 diff changeset	1863 case 0:
caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!) Michael Pavone <pavone@retrodev.com> parents: 2504 diff changeset	1864 if (output_disabled) {
caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!) Michael Pavone <pavone@retrodev.com> parents: 2504 diff changeset	1865 pixel.index &= context->regs[REG_BG_COLOR];
caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!) Michael Pavone <pavone@retrodev.com> parents: 2504 diff changeset	1866 *debug_dst = DBG_SRC_BG;
caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!) Michael Pavone <pavone@retrodev.com> parents: 2504 diff changeset	1867 }
caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!) Michael Pavone <pavone@retrodev.com> parents: 2504 diff changeset	1868 break;
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1869 case 1:
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1870 pixel.index &= sprite;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1871 if (pixel.index) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1872 *debug_dst = DBG_SRC_S;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1873 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1874 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1875 case 2:
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1876 pixel.index &= plane_a;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1877 if (pixel.index) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1878 *debug_dst = DBG_SRC_A;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1879 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1880 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1881 case 3:
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1882 pixel.index &= plane_b;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1883 if (pixel.index) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1884 *debug_dst = DBG_SRC_B;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1885 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1886 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1887 }
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1888 if (pixel.intensity == BUF_BIT_PRIORITY << 1) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1889 pixel.index += HIGHLIGHT_OFFSET;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1890 } else if (!pixel.intensity) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1891 pixel.index += SHADOW_OFFSET;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1892 }
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1893 debug_dst++;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1894 *(dst++) = pixel.index;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1895 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1896 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1897
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1898 static void render_map_output(uint32_t line, int32_t col, vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1899 {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1900 uint8_t *dst;
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1901 uint8_t *debug_dst;
2675 dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	1902 uint8_t output_disabled = (context->test_regs[0] & TEST_BIT_DISABLE) != 0;
dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	1903 uint8_t test_layer = context->test_regs[0] >> 7 & 3;
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	1904 if (context->state == PREPARING && !test_layer) {
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1905 if (col) {
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1906 col -= 2;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1907 dst = context->compositebuf + BORDER_LEFT + col * 8;
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1908 } else {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1909 dst = context->compositebuf;
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	1910 pixel_t bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F];
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1911 memset(dst, 0, BORDER_LEFT);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1912 context->done_composite = dst + BORDER_LEFT;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1913 return;
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1914 }
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1915 memset(dst, 0, 16);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1916 context->done_composite = dst + 16;
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	1917 return;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	1918 }
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1919 line &= 0xFF;
1180 e2b81a0f8fd8 Undo poorly thought out minor optimization that screwed up rendering Michael Pavone <pavone@retrodev.com> parents: 1179 diff changeset	1920 render_map(context->col_2, context->tmp_buf_b, context->buf_b_off+8, context);
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1921 uint8_t *sprite_buf;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1922 uint8_t sprite, plane_a, plane_b;
436 e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1923 int plane_a_off, plane_b_off;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1924 if (col)
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1925 {
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1926 col-=2;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1927 dst = context->compositebuf + BORDER_LEFT + col * 8;
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1928 debug_dst = context->layer_debug_buf + BORDER_LEFT + col * 8;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1929
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1930
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1931 uint8_t a_src, src;
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1932 uint8_t *buf_a;
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1933 int plane_a_mask;
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1934 if (context->flags & FLAG_WINDOW) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1935 plane_a_off = context->buf_a_off;
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1936 buf_a = context->tmp_buf_a;
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1937 a_src = DBG_SRC_W;
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1938 plane_a_mask = SCROLL_BUFFER_MASK;
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1939 } else {
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1940 if (context->flags & FLAG_WINDOW_EDGE) {
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1941 buf_a = context->tmp_buf_a + context->buf_a_off;
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1942 plane_a_mask = 15;
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1943 plane_a_off = -context->hscroll_a_fine;
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1944 } else {
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1945 plane_a_off = context->buf_a_off - context->hscroll_a_fine;
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1946 plane_a_mask = SCROLL_BUFFER_MASK;
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1947 buf_a = context->tmp_buf_a;
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1948 }
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1949 a_src = DBG_SRC_A;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1950 }
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1951 plane_a_off &= plane_a_mask;
1885 4178ce857e87 Calculate fine scroll once per line for a small speedup Michael Pavone <pavone@retrodev.com> parents: 1884 diff changeset	1952 plane_b_off = context->buf_b_off - context->hscroll_b_fine;
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1953 //printf("A \| tmp_buf offset: %d\n", 8 - (context->hscroll_a & 0x7));
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1954
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1955 if (context->regs[REG_MODE_4] & BIT_HILIGHT) {
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1956 if (output_disabled \|\| test_layer) {
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1957 render_testreg_highlight(context, col, dst, debug_dst, buf_a, plane_a_off, plane_a_mask, plane_b_off, output_disabled, test_layer);
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1958 } else {
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1959 render_highlight(context, col, dst, debug_dst, buf_a, plane_a_off, plane_a_mask, plane_b_off);
722 8f5339961903 Restore the other 2 debug display modes Michael Pavone <pavone@retrodev.com> parents: 720 diff changeset	1960 }
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1961 } else {
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1962 if (output_disabled \|\| test_layer) {
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1963 render_testreg(context, col, dst, debug_dst, buf_a, plane_a_off, plane_a_mask, plane_b_off, output_disabled, test_layer);
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1964 } else {
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1965 render_normal(context, col, dst, debug_dst, buf_a, plane_a_off, plane_a_mask, plane_b_off);
230 d3266cee02c9 Implemented shadow hilight mode. Mike Pavone <pavone@retrodev.com> parents: 191 diff changeset	1966 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1967 }
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1968 dst += 16;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1969 } else {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1970 dst = context->compositebuf;
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1971 debug_dst = context->layer_debug_buf;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1972 uint8_t pixel = 0;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1973 if (output_disabled) {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1974 pixel = 0x3F;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1975 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1976 if (test_layer) {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1977 switch(test_layer)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1978 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1979 case 1:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1980 memset(dst, 0, BORDER_LEFT);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1981 memset(debug_dst, DBG_SRC_BG, BORDER_LEFT);
1878 881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1982 dst += BORDER_LEFT;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1983 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1984 case 2: {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1985 //plane A
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1986 //TODO: Deal with Window layer
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1987 int i;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1988 i = 0;
1885 4178ce857e87 Calculate fine scroll once per line for a small speedup Michael Pavone <pavone@retrodev.com> parents: 1884 diff changeset	1989 uint8_t buf_off = context->buf_a_off - context->hscroll_a_fine + (16 - BORDER_LEFT);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1990 //uint8_t *src = context->tmp_buf_a + ((context->buf_a_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_a & 0xF))) & SCROLL_BUFFER_MASK);
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1991 for (; i < BORDER_LEFT; buf_off++, i++, dst++, debug_dst++)
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1992 {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1993 *dst = context->tmp_buf_a[buf_off & SCROLL_BUFFER_MASK];
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1994 *debug_dst = DBG_SRC_A;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1995 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1996 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1997 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1998 case 3: {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1999 //plane B
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2000 int i;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2001 i = 0;
1885 4178ce857e87 Calculate fine scroll once per line for a small speedup Michael Pavone <pavone@retrodev.com> parents: 1884 diff changeset	2002 uint8_t buf_off = context->buf_b_off - context->hscroll_b_fine + (16 - BORDER_LEFT);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2003 //uint8_t *src = context->tmp_buf_b + ((context->buf_b_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_b & 0xF))) & SCROLL_BUFFER_MASK);
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	2004 for (; i < BORDER_LEFT; buf_off++, i++, dst++, debug_dst++)
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2005 {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2006 *dst = context->tmp_buf_b[buf_off & SCROLL_BUFFER_MASK];
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	2007 *debug_dst = DBG_SRC_B;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2008 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2009 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2010 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2011 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2012 } else {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2013 memset(dst, pixel, BORDER_LEFT);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2014 memset(debug_dst, DBG_SRC_BG, BORDER_LEFT);
1878 881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	2015 dst += BORDER_LEFT;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2016 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2017 }
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2018 context->done_composite = dst;
436 e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	2019 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	2020 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2021 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2022
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2023 static void render_map_mode4(uint32_t line, int32_t col, vdp_context * context)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2024 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2025 uint32_t vscroll = line;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2026 if (col < 24 \|\| !(context->regs[REG_MODE_1] & BIT_VSCRL_LOCK)) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2027 vscroll += context->regs[REG_Y_SCROLL];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2028 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2029 if (vscroll > 223) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2030 vscroll -= 224;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2031 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2032 vscroll &= 7;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2033 if (context->col_1 & 0x400) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2034 //vflip
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2035 vscroll = 7 - vscroll;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2036 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2037
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2038 uint32_t pixels = planar_to_chunky[context->fetch_tmp[0]] << 1;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2039 pixels \|= planar_to_chunky[context->fetch_tmp[1]];
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2040
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2041 uint32_t address = mode4_address_map[((context->col_1 & 0x1FF) * 32) + vscroll * 4 + 2];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2042 pixels \|= planar_to_chunky[context->vdpmem[address]] << 3;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2043 pixels \|= planar_to_chunky[context->vdpmem[address+1]] << 2;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2044
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2045 int i, i_inc, i_limit;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2046 if (context->col_1 & 0x200) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2047 //hflip
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2048 i = 0;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2049 i_inc = 4;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2050 i_limit = 32;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2051 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2052 i = 28;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2053 i_inc = -4;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2054 i_limit = -4;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2055 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2056 uint8_t pal_priority = (context->col_1 >> 7 & 0x10) \| (context->col_1 >> 6 & 0x40);
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2057 for (uint8_t *dst = context->tmp_buf_a + context->buf_a_off; i != i_limit; i += i_inc, dst++)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2058 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2059 *dst = (pixels >> i & 0xF) \| pal_priority;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2060 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2061 context->buf_a_off = (context->buf_a_off + 8) & 15;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2062
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2063 uint8_t dst = context->compositebuf + col 8 + BORDER_LEFT;
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	2064 uint8_t debug_dst = context->layer_debug_buf + col 8 + BORDER_LEFT;
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2065 if (context->state == PREPARING) {
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2066 memset(dst, 0x10 + (context->regs[REG_BG_COLOR] & 0xF) + MODE4_OFFSET, 8);
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2067 memset(debug_dst, DBG_SRC_BG, 8);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2068 context->done_composite = dst + 8;
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2069 return;
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2070 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2071
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	2072 if (col \|\| !(context->regs[REG_MODE_1] & BIT_COL0_MASK)) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	2073 uint8_t sprite_src = context->linebuf + col 8;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	2074 if (context->regs[REG_MODE_1] & BIT_SPRITE_8PX) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	2075 sprite_src += 8;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	2076 }
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	2077 for (int i = 0; i < 8; i++, sprite_src++)
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	2078 {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	2079 uint8_t bg_src = context->tmp_buf_a + ((8 + i + col 8 - (context->hscroll_a & 0x7)) & 15);
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	2080 if ((bg_src & 0x4F) > 0x40 \|\| !sprite_src) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	2081 //background plane has priority and is opaque or sprite layer is transparent
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2082 uint8_t pixel = *bg_src & 0x1F;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2083 *(dst++) = pixel + MODE4_OFFSET;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2084 *(debug_dst++) = pixel ? DBG_SRC_A : DBG_SRC_BG;
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	2085 } else {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	2086 //sprite layer is opaque and not covered by high priority BG pixels
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2087 (dst++) = (sprite_src \| 0x10) + MODE4_OFFSET;
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	2088 *(debug_dst++) = DBG_SRC_S;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2089 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2090 }
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2091 context->done_composite = dst;
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	2092 } else {
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2093 memset(dst, 0x10 + (context->regs[REG_BG_COLOR] & 0xF) + MODE4_OFFSET, 8);
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2094 memset(debug_dst, DBG_SRC_BG, 8);
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2095 context->done_composite = dst + 8;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2096 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2097 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2098
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	2099 static uint32_t const h40_hsync_cycles[] = {19, 20, 20, 20, 18, 20, 20, 20, 18, 20, 20, 20, 18, 20, 20, 20, 19};
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2100
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	2101 static void vdp_advance_line(vdp_context *context)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2102 {
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2103 #ifdef TIMING_DEBUG
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2104 static uint32_t last_line = 0xFFFFFFFF;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2105 if (last_line != 0xFFFFFFFF) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2106 uint32_t diff = context->cycles - last_line;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2107 if (diff != MCLKS_LINE) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2108 printf("Line %d took %d cycles\n", context->vcounter, diff);
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2109 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2110 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2111 last_line = context->cycles;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2112 #endif
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2113 uint16_t jump_start, jump_end;
1156 b519965f6394 Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1155 diff changeset	2114 uint8_t is_mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5;
b519965f6394 Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1155 diff changeset	2115 if (is_mode_5) {
b519965f6394 Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1155 diff changeset	2116 if (context->flags2 & FLAG2_REGION_PAL) {
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	2117 if (context->regs[REG_MODE_2] & BIT_PAL) {
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2118 jump_start = 0x10B;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2119 jump_end = 0x1D2;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2120 } else {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2121 jump_start = 0x103;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2122 jump_end = 0x1CA;
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2123 }
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2124 } else if (context->regs[REG_MODE_2] & BIT_PAL) {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2125 jump_start = 0x100;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2126 jump_end = 0x1FA;
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	2127 } else {
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2128 jump_start = 0xEB;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2129 jump_end = 0x1E5;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2130 }
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2131 } else {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2132 jump_start = 0xDB;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2133 jump_end = 0x1D5;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2134 }
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2135
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2136 if (context->enabled_debuggers & (1 << DEBUG_CRAM \| 1 << DEBUG_COMPOSITE)) {
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2137 uint32_t line = context->vcounter;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2138 if (line >= jump_end) {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2139 line -= jump_end - jump_start;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2140 }
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2141 uint32_t total_lines = (context->flags2 & FLAG2_REGION_PAL) ? 313 : 262;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2142
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2143 if (total_lines - line <= context->border_top) {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2144 line -= total_lines - context->border_top;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2145 } else {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2146 line += context->border_top;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2147 }
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2148 if (context->enabled_debuggers & (1 << DEBUG_CRAM)) {
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2149 pixel_t fb = context->debug_fbs[DEBUG_CRAM] + context->debug_fb_pitch[DEBUG_CRAM] line / sizeof(pixel_t);
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2150 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2151 for (int i = 0; i < 64; i++)
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	2152 {
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2153 for (int x = 0; x < 8; x++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2154 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2155 *(fb++) = context->colors[i];
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2156 }
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2157 }
2411 efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2158 } else if (context->type == VDP_GENESIS \|\| (context->regs[REG_MODE_1] & BIT_MODE_4)) {
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2159 for (int i = MODE4_OFFSET; i < MODE4_OFFSET+32; i++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2160 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2161 for (int x = 0; x < 16; x++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2162 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2163 *(fb++) = context->colors[i];
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2164 }
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	2165 }
2411 efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2166 } else if (context->type != VDP_GENESIS) {
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2167 uint16_t address = context->regs[REG_COLOR_TABLE] << 6;
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2168 for (int i = 0; i < 32; i++, address++)
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2169 {
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2170 uint8_t entry = context->vdpmem[mode4_address_map[address] ^ 1];
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2171 uint8_t fg = entry >> 4, bg = entry & 0xF;
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2172 pixel_t fg_full, bg_full;
2411 efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2173 if (context->type == VDP_GAMEGEAR) {
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2174 //Game Gear uses CRAM entries 16-31 for TMS9918A modes
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2175 fg_full = context->colors[fg + 16 + MODE4_OFFSET];
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2176 bg_full = context->colors[bg + 16 + MODE4_OFFSET];
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2177 } else {
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2178 fg <<= 1;
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2179 fg = (fg & 0xE) \| (fg << 1 & 0x20);
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2180 fg_full = context->color_map[fg \| FBUF_TMS];
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2181 bg <<= 1;
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2182 bg = (bg & 0xE) \| (bg << 1 & 0x20);
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2183 bg_full = context->color_map[bg \| FBUF_TMS];
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2184 }
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2185 for (int x = 0; x < 8; x++)
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2186 {
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2187 *(fb++) = fg_full;
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2188 }
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2189 for (int x = 0; x < 8; x++)
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2190 {
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2191 *(fb++) = bg_full;
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2192 }
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2193 }
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	2194 }
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	2195 }
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	2196 if (
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2197 context->enabled_debuggers & (1 << DEBUG_COMPOSITE)
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	2198 && line < (context->inactive_start + context->border_bot + context->border_top)
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	2199 ) {
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2200 pixel_t fb = context->debug_fbs[DEBUG_COMPOSITE] + context->debug_fb_pitch[DEBUG_COMPOSITE] line / sizeof(pixel_t);
2510 0a22c1901492 Fix display of window plane in VDP composition viewer Michael Pavone <pavone@retrodev.com> parents: 2509 diff changeset	2201 if (is_mode_5) {
0a22c1901492 Fix display of window plane in VDP composition viewer Michael Pavone <pavone@retrodev.com> parents: 2509 diff changeset	2202 uint32_t left, right;
0a22c1901492 Fix display of window plane in VDP composition viewer Michael Pavone <pavone@retrodev.com> parents: 2509 diff changeset	2203 uint16_t top_line, bottom_line;
2557 75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker Michael Pavone <pavone@retrodev.com> parents: 2513 diff changeset	2204 if (context->window_v_latch & WINDOW_DOWN) {
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker Michael Pavone <pavone@retrodev.com> parents: 2513 diff changeset	2205 top_line = ((context->window_v_latch & 0x1F) << 3) + context->border_top;
2510 0a22c1901492 Fix display of window plane in VDP composition viewer Michael Pavone <pavone@retrodev.com> parents: 2509 diff changeset	2206 bottom_line = context->inactive_start + context->border_top;
0a22c1901492 Fix display of window plane in VDP composition viewer Michael Pavone <pavone@retrodev.com> parents: 2509 diff changeset	2207 } else {
0a22c1901492 Fix display of window plane in VDP composition viewer Michael Pavone <pavone@retrodev.com> parents: 2509 diff changeset	2208 top_line = context->border_top;
2557 75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker Michael Pavone <pavone@retrodev.com> parents: 2513 diff changeset	2209 bottom_line = ((context->window_v_latch & 0x1F) << 3) + context->border_top;
2510 0a22c1901492 Fix display of window plane in VDP composition viewer Michael Pavone <pavone@retrodev.com> parents: 2509 diff changeset	2210 }
0a22c1901492 Fix display of window plane in VDP composition viewer Michael Pavone <pavone@retrodev.com> parents: 2509 diff changeset	2211 if (line >= top_line && line < bottom_line) {
0a22c1901492 Fix display of window plane in VDP composition viewer Michael Pavone <pavone@retrodev.com> parents: 2509 diff changeset	2212 left = 0;
0a22c1901492 Fix display of window plane in VDP composition viewer Michael Pavone <pavone@retrodev.com> parents: 2509 diff changeset	2213 right = 320 + BORDER_LEFT + BORDER_RIGHT;
2557 75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker Michael Pavone <pavone@retrodev.com> parents: 2513 diff changeset	2214 } else if (context->window_h_latch & WINDOW_RIGHT) {
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker Michael Pavone <pavone@retrodev.com> parents: 2513 diff changeset	2215 left = (context->window_h_latch & 0x1F) * 16 + BORDER_LEFT;
2510 0a22c1901492 Fix display of window plane in VDP composition viewer Michael Pavone <pavone@retrodev.com> parents: 2509 diff changeset	2216 right = 320 + BORDER_LEFT + BORDER_RIGHT;
0a22c1901492 Fix display of window plane in VDP composition viewer Michael Pavone <pavone@retrodev.com> parents: 2509 diff changeset	2217 } else {
0a22c1901492 Fix display of window plane in VDP composition viewer Michael Pavone <pavone@retrodev.com> parents: 2509 diff changeset	2218 left = 0;
2557 75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker Michael Pavone <pavone@retrodev.com> parents: 2513 diff changeset	2219 right = (context->window_h_latch & 0x1F) * 16 + BORDER_LEFT;
2510 0a22c1901492 Fix display of window plane in VDP composition viewer Michael Pavone <pavone@retrodev.com> parents: 2509 diff changeset	2220 }
0a22c1901492 Fix display of window plane in VDP composition viewer Michael Pavone <pavone@retrodev.com> parents: 2509 diff changeset	2221 for (uint32_t i = left; i < right; i++)
0a22c1901492 Fix display of window plane in VDP composition viewer Michael Pavone <pavone@retrodev.com> parents: 2509 diff changeset	2222 {
0a22c1901492 Fix display of window plane in VDP composition viewer Michael Pavone <pavone@retrodev.com> parents: 2509 diff changeset	2223 uint8_t src = context->layer_debug_buf[i] & DBG_SRC_MASK;
0a22c1901492 Fix display of window plane in VDP composition viewer Michael Pavone <pavone@retrodev.com> parents: 2509 diff changeset	2224 if (src == DBG_SRC_A) {
0a22c1901492 Fix display of window plane in VDP composition viewer Michael Pavone <pavone@retrodev.com> parents: 2509 diff changeset	2225 context->layer_debug_buf[i] &= ~DBG_SRC_MASK;
0a22c1901492 Fix display of window plane in VDP composition viewer Michael Pavone <pavone@retrodev.com> parents: 2509 diff changeset	2226 context->layer_debug_buf[i] \|= DBG_SRC_W;
0a22c1901492 Fix display of window plane in VDP composition viewer Michael Pavone <pavone@retrodev.com> parents: 2509 diff changeset	2227 }
0a22c1901492 Fix display of window plane in VDP composition viewer Michael Pavone <pavone@retrodev.com> parents: 2509 diff changeset	2228 }
0a22c1901492 Fix display of window plane in VDP composition viewer Michael Pavone <pavone@retrodev.com> parents: 2509 diff changeset	2229 }
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	2230 for (int i = 0; i < LINEBUF_SIZE; i++)
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	2231 {
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	2232 *(fb++) = context->debugcolors[context->layer_debug_buf[i]];
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	2233 }
1299 da1ffc4026c4 Fix latching of V32 mode bit Michael Pavone <pavone@retrodev.com> parents: 1290 diff changeset	2234 }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2235 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2236
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2237 context->vcounter++;
2686 05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	2238 if (context->renderer && context->vcounter == context->inactive_start) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	2239 context->frame++;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	2240 }
2557 75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker Michael Pavone <pavone@retrodev.com> parents: 2513 diff changeset	2241 if (is_mode_5) {
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker Michael Pavone <pavone@retrodev.com> parents: 2513 diff changeset	2242 context->window_h_latch = context->regs[REG_WINDOW_H];
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker Michael Pavone <pavone@retrodev.com> parents: 2513 diff changeset	2243 context->window_v_latch = context->regs[REG_WINDOW_V];
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker Michael Pavone <pavone@retrodev.com> parents: 2513 diff changeset	2244 }
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2245 if (context->vcounter == jump_start) {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2246 context->vcounter = jump_end;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2247 } else {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2248 context->vcounter &= 0x1FF;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2249 }
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	2250 if (context->state == PREPARING) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	2251 context->state = ACTIVE;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	2252 }
1377 e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	2253 if (context->vcounter == 0x1FF) {
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	2254 context->flags2 &= ~FLAG2_PAUSE;
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	2255 }
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2256
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	2257 if (context->state != ACTIVE) {
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2258 context->hint_counter = context->regs[REG_HINT];
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2259 } else if (context->hint_counter) {
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2260 context->hint_counter--;
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2261 } else {
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2262 context->flags2 \|= FLAG2_HINT_PENDING;
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2263 context->pending_hint_start = context->cycles;
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2264 context->hint_counter = context->regs[REG_HINT];
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2265 }
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2266 }
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2267
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2268 static void vram_debug_mode5(pixel_t fb, uint32_t pitch, vdp_context context)
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2269 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2270 uint8_t pal = (context->debug_modes[DEBUG_VRAM] % 4) << 4;
2381 d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2271 int yshift, ymask, tilesize;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2272 if (context->double_res) {
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2273 yshift = 5;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2274 ymask = 0xF;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2275 tilesize = 64;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2276 } else {
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2277 yshift = 4;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2278 ymask = 0x7;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2279 tilesize = 32;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2280 }
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2281 for (int y = 0; y < 512; y++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2282 {
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2283 pixel_t line = fb + y pitch / sizeof(pixel_t);
2381 d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2284 int row = y >> yshift;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2285 int yoff = y >> 1 & ymask;
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2286 for (int col = 0; col < 64; col++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2287 {
2381 d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2288 uint16_t address = (row * 64 + col) * tilesize + yoff * 4;
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2289 for (int x = 0; x < 4; x++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2290 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2291 uint8_t byte = context->vdpmem[address++];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2292 uint8_t left = byte >> 4 \| pal;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2293 uint8_t right = byte & 0xF \| pal;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2294 *(line++) = context->colors[left];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2295 *(line++) = context->colors[left];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2296 *(line++) = context->colors[right];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2297 *(line++) = context->colors[right];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2298 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2299 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2300 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2301 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2302
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2303 static void vram_debug_mode4(pixel_t fb, uint32_t pitch, vdp_context context)
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2304 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2305 for (int y = 0; y < 256; y++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2306 {
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2307 pixel_t line = fb + y pitch / sizeof(pixel_t);
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2308 int row = y >> 4;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2309 int yoff = y >> 1 & 7;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2310 for (int col = 0; col < 64; col++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2311 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2312 uint8_t pal = (col >= 32) << 4;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2313 uint16_t address = (row * 32 + (col & 31)) * 32 + yoff * 4;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2314 uint32_t pixels = 0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2315 for (int x = 0; x < 4; x++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2316 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2317 uint8_t byte = context->vdpmem[mode4_address_map[address++]];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2318 pixels \|= planar_to_chunky[byte] << (x ^ 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2319 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2320 for (int x = 0; x < 32; x+=4)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2321 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2322 uint8_t pixel = (pixels >> (28 - x) & 0xF) \| pal;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2323 *(line++) = context->colors[pixel + MODE4_OFFSET];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2324 *(line++) = context->colors[pixel + MODE4_OFFSET];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2325 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2326 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2327 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2328 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2329
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2330 static void vram_debug_tms(pixel_t fb, uint32_t pitch, vdp_context context)
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2331 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2332 uint8_t pal = ((context->debug_modes[DEBUG_VRAM] % 14) + 2) << 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2333 pal = (pal & 0xE) \| (pal << 1 & 0x20);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2334 for (int y = 0; y < 512; y++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2335 {
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2336 pixel_t line = fb + y pitch / sizeof(pixel_t);
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2337 int row = y >> 4;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2338 int yoff = y >> 1 & 7;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2339 for (int col = 0; col < 64; col++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2340 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2341 uint16_t address = (row * 64 + col) * 8 + yoff;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2342 uint8_t byte = context->vdpmem[mode4_address_map[address^1]];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2343 for (int x = 0; x < 8; x++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2344 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2345 uint16_t pixel = (byte & 0x80) ? pal : 0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2346 byte <<= 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2347 *(line++) = context->color_map[pixel \| FBUF_TMS];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2348 *(line++) = context->color_map[pixel \| FBUF_TMS];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2349 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2350 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2351 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2352 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2353
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2354 static void plane_debug_mode5(pixel_t fb, uint32_t pitch, vdp_context context)
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2355 {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2356 uint16_t hscroll_mask;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2357 uint16_t v_mul;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2358 uint16_t vscroll_mask = 0x1F \| (context->regs[REG_SCROLL] & 0x30) << 1;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2359 switch(context->regs[REG_SCROLL] & 0x3)
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2360 {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2361 case 0:
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2362 hscroll_mask = 0x1F;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2363 v_mul = 64;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2364 break;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2365 case 0x1:
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2366 hscroll_mask = 0x3F;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2367 v_mul = 128;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2368 break;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2369 case 0x2:
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2370 //TODO: Verify this behavior
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2371 hscroll_mask = 0x1F;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2372 v_mul = 0;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2373 break;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2374 case 0x3:
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2375 hscroll_mask = 0x7F;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2376 v_mul = 256;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2377 break;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2378 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2379 uint16_t table_address;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2380 switch(context->debug_modes[DEBUG_PLANE] & 3)
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2381 {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2382 case 0:
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2383 table_address = context->regs[REG_SCROLL_A] << 10 & 0xE000;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2384 break;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2385 case 1:
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2386 table_address = context->regs[REG_SCROLL_B] << 13 & 0xE000;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2387 break;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2388 case 2:
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2389 table_address = context->regs[REG_WINDOW] << 10;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2390 if (context->regs[REG_MODE_4] & BIT_H40) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2391 table_address &= 0xF000;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2392 v_mul = 128;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2393 hscroll_mask = 0x3F;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2394 } else {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2395 table_address &= 0xF800;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2396 v_mul = 64;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2397 hscroll_mask = 0x1F;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2398 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2399 vscroll_mask = 0x1F;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2400 break;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2401 }
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2402 pixel_t bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F];
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2403 uint16_t num_rows;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2404 int num_lines;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2405 if (context->double_res) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2406 num_rows = 64;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2407 num_lines = 16;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2408 } else {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2409 num_rows = 128;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2410 num_lines = 8;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2411 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2412 for (uint16_t row = 0; row < num_rows; row++)
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2413 {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2414 uint16_t row_address = table_address + (row & vscroll_mask) * v_mul;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2415 for (uint16_t col = 0; col < 128; col++)
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2416 {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2417 uint16_t address = row_address + (col & hscroll_mask) * 2;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2418 //pccv hnnn nnnn nnnn
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2419 //
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2420 uint16_t entry = context->vdpmem[address] << 8 \| context->vdpmem[address + 1];
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2421 uint8_t pal = entry >> 9 & 0x30;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2422
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2423 pixel_t dst = fb + (row pitch * num_lines / sizeof(pixel_t)) + col * 8;
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2424 if (context->double_res) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2425 address = (entry & 0x3FF) * 64;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2426 } else {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2427 address = (entry & 0x7FF) * 32;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2428 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2429 int y_diff = 4;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2430 if (entry & 0x1000) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2431 y_diff = -4;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2432 address += (num_lines - 1) * 4;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2433 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2434 int x_diff = 1;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2435 if (entry & 0x800) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2436 x_diff = -1;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2437 address += 3;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2438 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2439 for (int y = 0; y < num_lines; y++)
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2440 {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2441 uint16_t trow_address = address;
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2442 pixel_t *row_dst = dst;
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2443 for (int x = 0; x < 4; x++)
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2444 {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2445 uint8_t byte = context->vdpmem[trow_address];
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2446 trow_address += x_diff;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2447 uint8_t left, right;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2448 if (x_diff > 0) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2449 left = byte >> 4;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2450 right = byte & 0xF;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2451 } else {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2452 left = byte & 0xF;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2453 right = byte >> 4;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2454 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2455 *(row_dst++) = left ? context->colors[left\|pal] : bg_color;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2456 *(row_dst++) = right ? context->colors[right\|pal] : bg_color;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2457 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2458 address += y_diff;
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2459 dst += pitch / sizeof(pixel_t);
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2460 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2461 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2462 }
2700 1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2463 if (context->debug_flags & DEBUG_FLAG_PLANE_BORDER) {
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2464 pixel_t border_line = render_map_color(255, 0, 255);
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2465 if ((context->debug_modes[DEBUG_PLANE] & 3) < 2) {
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2466 uint16_t hscroll_base = (context->regs[REG_HSCROLL] & 0x3F) << 10;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2467 hscroll_base += (context->debug_modes[DEBUG_PLANE] & 1) * 2;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2468 uint16_t hscroll_mask = 0;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2469 if (context->regs[REG_MODE_3] & 0x2) {
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2470 hscroll_mask \|= 0xF8;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2471 }
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2472 if (context->regs[REG_MODE_3] & 0x1) {
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2473 hscroll_mask \|= 0x7;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2474 }
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2475 uint16_t hscroll = 1023 - (context->vdpmem[hscroll_base] << 8 \| context->vdpmem[hscroll_base+1]) & 1023;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2476 uint16_t width = (context->regs[REG_MODE_4] & BIT_H40) ? 320 : 256;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2477 if (context->regs[REG_MODE_3] & BIT_VSCROLL) {
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2478 //2-column vscroll
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2479 uint16_t num_cols = width >> 4;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2480 for (int y_off = -2; y_off; y_off++)
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2481 {
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2482 for (uint16_t col = 0; col < num_cols; col++)
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2483 {
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2484 uint16_t vscroll = context->vsram[col * 2 + (context->debug_modes[DEBUG_PLANE] & 1)] & 1023;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2485 int y = (vscroll + y_off) & 1023;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2486 pixel_t line = fb + y pitch / sizeof(pixel_t);
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2487 for (int x = col ? hscroll + col * 16 : hscroll - 2, x_end = col == num_cols-1 ? hscroll + width + 2 : x + (col ? 16 : 18); x < x_end; x++)
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2488 {
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2489 line[x & 1023] = border_line;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2490 }
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2491 }
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2492 }
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2493 for (int y = context->vsram[context->debug_modes[DEBUG_PLANE] & 1], y_end = y + context->inactive_start; y < y_end; y++)
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2494 {
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2495 pixel_t line = fb + (y & 1023) pitch / sizeof(pixel_t);
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2496 line[(hscroll - 2) & 1023] = border_line;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2497 line[(hscroll - 1) & 1023] = border_line;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2498 uint16_t hscroll_addr = hscroll_base + ((y - (y_end - context->inactive_start)) & hscroll_mask) * 4;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2499 hscroll = 1024 - (context->vdpmem[hscroll_addr] << 8 \| context->vdpmem[hscroll_addr+1]) & 1023;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2500 }
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2501 for (int y = context->vsram[19 * 2 + (context->debug_modes[DEBUG_PLANE] & 1)], y_end = y + context->inactive_start; y < y_end; y++)
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2502 {
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2503 pixel_t line = fb + (y & 1023) pitch / sizeof(pixel_t);
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2504 line[(hscroll + width) & 1023] = border_line;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2505 line[(hscroll + width + 1) & 1023] = border_line;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2506 uint16_t hscroll_addr = hscroll_base + ((y - (y_end - context->inactive_start)) & hscroll_mask) * 4;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2507 hscroll = 1024 - (context->vdpmem[hscroll_addr] << 8 \| context->vdpmem[hscroll_addr+1]) & 1023;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2508 }
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2509 for (int y_off = context->inactive_start; y_off < context->inactive_start + 2; y_off++)
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2510 {
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2511 for (uint16_t col = 0; col < num_cols; col++)
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2512 {
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2513 uint16_t vscroll = context->vsram[col * 2 + (context->debug_modes[DEBUG_PLANE] & 1)] & 1023;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2514 int y = (vscroll + y_off) & 1023;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2515 pixel_t line = fb + y pitch / sizeof(pixel_t);
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2516 for (int x = col ? hscroll + col * 16 : hscroll - 2, x_end = col == num_cols-1 ? hscroll + width + 2 : x + (col ? 16 : 18); x < x_end; x++)
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2517 {
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2518 line[x & 1023] = border_line;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2519 }
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2520 }
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2521 }
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2522 } else {
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2523 //full screen vscroll
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2524 uint16_t vscroll = context->vsram[context->debug_modes[DEBUG_PLANE] & 1] & 1023;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2525 int y = (vscroll - 2) & 1023;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2526 pixel_t line = fb + y pitch / sizeof(pixel_t);
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2527 for (int x = hscroll - 2, x_end = hscroll + width + 2; x < x_end; x++)
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2528 {
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2529 line[x & 1023] = border_line;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2530 }
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2531 y = (y + 1) & 1023;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2532 line = fb + y * pitch / sizeof(pixel_t);
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2533 for (int x = hscroll - 1, x_end = hscroll + width + 1; x < x_end; x++)
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2534 {
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2535 line[x & 1023] = border_line;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2536 }
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2537 int y_end = y + context->inactive_start + 1;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2538 for (y++; y < y_end; y++)
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2539 {
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2540 line = fb + (y & 1023) * pitch / sizeof(pixel_t);
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2541 line[(hscroll - 2) & 1023] = border_line;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2542 line[(hscroll - 1) & 1023] = border_line;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2543 line[(hscroll + width) & 1023] = border_line;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2544 line[(hscroll + width + 1) & 1023] = border_line;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2545 uint16_t hscroll_last = hscroll;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2546 uint16_t hscroll_addr = hscroll_base + ((y - vscroll) & hscroll_mask) * 4;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2547 hscroll = 1024 - (context->vdpmem[hscroll_addr] << 8 \| context->vdpmem[hscroll_addr+1]) & 1023;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2548 if (abs(hscroll - hscroll_last) > 512) {
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2549 //handle wraparound
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2550 if (hscroll > hscroll_last) {
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2551 hscroll_last += 1024;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2552 } else {
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2553 hscroll += 1024;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2554 }
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2555 }
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2556 if (hscroll_last < hscroll) {
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2557 for (int x = hscroll_last + width + 2, x_end = hscroll + width; x < x_end; x++)
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2558 {
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2559 line[x & 1023] = border_line;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2560 }
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2561 line = fb + ((y+1) & 1023) * pitch / sizeof(pixel_t);
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2562 for (int x = hscroll_last, x_end = hscroll; x < x_end; x++)
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2563 {
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2564 line[x & 1023] = border_line;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2565 }
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2566 } else if (hscroll_last > hscroll) {
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2567 for (int x = hscroll, x_end = hscroll_last; x < x_end; x++)
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2568 {
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2569 line[x & 1023] = border_line;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2570 }
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2571 line = fb + ((y+1) & 1023) * pitch / sizeof(pixel_t);
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2572 for (int x = hscroll + width + 2, x_end = hscroll_last + width; x < x_end; x++)
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2573 {
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2574 line[x & 1023] = border_line;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2575 }
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2576 }
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2577 }
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2578 line = fb + (y_end & 1023) * pitch / sizeof(pixel_t);
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2579 for (int x = hscroll - 2, x_end = hscroll + width + 2; x < x_end; x++)
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2580 {
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2581 line[x & 1023] = border_line;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2582 }
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2583 line = fb + ((y_end + 1) & 1023) * pitch / sizeof(pixel_t);
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2584 for (int x = hscroll - 2, x_end = hscroll + width + 2; x < x_end; x++)
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2585 {
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2586 line[x & 1023] = border_line;
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2587 }
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2588 }
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2589 }
1cfd000dc750 WIP display screen border in plane debugger Michael Pavone <pavone@retrodev.com> parents: 2693 diff changeset	2590 }
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2591 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2592
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2593 static void sprite_debug_mode5(pixel_t fb, uint32_t pitch, vdp_context context)
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2594 {
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2595 pixel_t bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F];
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2596 //clear a single alpha channel bit so we can distinguish between actual bg color and sprite
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2597 //pixels that just happen to be the same color
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2598 bg_color &= 0xFEFFFFFF;
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2599 pixel_t *line = fb;
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2600 pixel_t border_line = render_map_color(0, 0, 255);
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2601 pixel_t sprite_outline = render_map_color(255, 0, 255);
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2602 int right_border = 256 + ((context->h40_lines > context->output_lines / 2) ? 640 : 512);
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2603 for (int y = 0; y < 1024; y++)
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2604 {
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2605 pixel_t *cur = line;
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2606 if (y != 256 && y != 256+context->inactive_start*2) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2607 for (int x = 0; x < 255; x++)
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2608 {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2609 *(cur++) = bg_color;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2610 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2611 *(cur++) = border_line;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2612 for (int x = 256; x < right_border; x++)
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2613 {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2614 *(cur++) = bg_color;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2615 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2616 *(cur++) = border_line;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2617 for (int x = right_border + 1; x < 1024; x++)
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2618 {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2619 *(cur++) = bg_color;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2620 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2621 } else {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2622 for (int x = 0; x < 1024; x++)
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2623 {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2624 *(cur++) = border_line;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2625 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2626 }
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2627 line += pitch / sizeof(pixel_t);
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2628 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2629 for (int i = 0, index = 0; i < context->max_sprites_frame; i++)
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2630 {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2631 uint32_t y = (context->sat_cache[index] & 3) << 8 \| context->sat_cache[index + 1];
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2632 if (!context->double_res) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2633 y &= 0x1FF;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2634 y <<= 1;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2635 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2636 uint8_t tile_width = ((context->sat_cache[index+2] >> 2) & 0x3);
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2637 uint32_t pixel_width = (tile_width + 1) * 16;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2638 uint8_t height = ((context->sat_cache[index+2] & 3) + 1) * 16;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2639 uint16_t col_offset = height * (context->double_res ? 4 : 2);
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2640 uint16_t att_addr = mode5_sat_address(context) + index * 2 + 4;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2641 uint16_t tileinfo = (context->vdpmem[att_addr] << 8) \| context->vdpmem[att_addr+1];
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2642 uint16_t tile_addr;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2643 if (context->double_res) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2644 tile_addr = (tileinfo & 0x3FF) << 6;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2645 } else {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2646 tile_addr = (tileinfo & 0x7FF) << 5;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2647 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2648 uint8_t pal = (tileinfo >> 9) & 0x30;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2649 uint16_t hflip = tileinfo & MAP_BIT_H_FLIP;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2650 uint16_t vflip = tileinfo & MAP_BIT_V_FLIP;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2651 uint32_t x = (((context->vdpmem[att_addr+ 2] & 0x3) << 8 \| context->vdpmem[att_addr + 3]) & 0x1FF) * 2;
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2652 pixel_t line = fb + y pitch / sizeof(pixel_t) + x;
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2653 pixel_t *cur = line;
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2654 for (uint32_t cx = x, x2 = x + pixel_width; cx < x2; cx++)
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2655 {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2656 *(cur++) = sprite_outline;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2657 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2658 uint8_t advance_source = 1;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2659 uint32_t y2 = y + height - 1;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2660 if (y2 > 1024) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2661 y2 = 1024;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2662 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2663 uint16_t line_offset = 4;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2664 if (vflip) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2665 tile_addr += col_offset - 4;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2666 line_offset = -line_offset;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2667 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2668 if (hflip) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2669 tile_addr += col_offset * tile_width + 3;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2670 col_offset = -col_offset;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2671 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2672 for (; y < y2; y++)
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2673 {
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2674 line += pitch / sizeof(pixel_t);
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2675 cur = line;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2676 *(cur++) = sprite_outline;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2677 uint16_t line_addr = tile_addr;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2678 for (uint8_t tx = 0; tx <= tile_width; tx++)
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2679 {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2680 uint16_t cur_addr = line_addr;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2681 for (uint8_t cx = 0; cx < 4; cx++)
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2682 {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2683 uint8_t pair = context->vdpmem[cur_addr];
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2684 pixel_t left, right;
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2685 if (hflip) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2686 right = pair >> 4;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2687 left = pair & 0xF;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2688 cur_addr--;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2689 } else {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2690 left = pair >> 4;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2691 right = pair & 0xF;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2692 cur_addr++;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2693 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2694 left = left ? context->colors[pal \| left] : bg_color;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2695 right = right ? context->colors[pal \| right] : bg_color;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2696 if (*cur == bg_color) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2697 *(cur) = left;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2698 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2699 cur++;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2700 if (cx \| tx) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2701 if (*cur == bg_color) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2702 *(cur) = left;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2703 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2704 cur++;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2705 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2706 if (*cur == bg_color) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2707 *(cur) = right;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2708 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2709 cur++;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2710 if (cx != 3 \|\| tx != tile_width) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2711 if (*cur == bg_color) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2712 *(cur) = right;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2713 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2714 cur++;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2715 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2716 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2717 line_addr += col_offset;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2718 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2719
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2720 *(cur++) = sprite_outline;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2721 if (advance_source \|\| context->double_res) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2722 tile_addr += line_offset;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2723 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2724 advance_source = !advance_source;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2725 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2726 if (y2 != 1024) {
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2727 line += pitch / sizeof(pixel_t);
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2728 cur = line;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2729 for (uint32_t cx = x, x2 = x + pixel_width; cx < x2; cx++)
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2730 {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2731 *(cur++) = sprite_outline;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2732 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2733 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2734 index = context->sat_cache[index+3] * 4;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2735 if (!index) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2736 break;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2737 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2738 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2739 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2740
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2741 static void plane_debug_mode4(pixel_t fb, uint32_t pitch, vdp_context context)
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2742 {
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2743 pixel_t bg_color = context->colors[(context->regs[REG_BG_COLOR] & 0xF) + MODE4_OFFSET];
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2744 uint32_t address = (context->regs[REG_SCROLL_A] & 0xE) << 10;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2745 for (uint32_t row_address = address, end = address + 32322; row_address < end; row_address += 2 * 32)
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2746 {
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2747 pixel_t *col = fb;
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2748 for(uint32_t cur = row_address, row_end = row_address + 2 * 32; cur < row_end; cur += 2)
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2749 {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2750 uint32_t mapped = mode4_address_map[cur];
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2751 uint16_t entry = context->vdpmem[mapped] << 8 \| context->vdpmem[mapped + 1];
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2752 uint32_t tile_address = (entry & 0x1FF) << 5;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2753 uint8_t pal = entry >> 7 & 0x10;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2754 uint32_t i_init, i_inc, i_limit, tile_inc;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2755 if (entry & 0x200) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2756 //hflip
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2757 i_init = 0;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2758 i_inc = 4;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2759 i_limit = 32;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2760 } else {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2761 i_init = 28;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2762 i_inc = -4;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2763 i_limit = -4;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2764 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2765 if (entry & 0x400) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2766 //vflip
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2767 tile_address += 7*4;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2768 tile_inc = -4;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2769 } else {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2770 tile_inc = 4;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2771 }
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2772 pixel_t *line = col;
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2773 for (int y = 0; y < 16; y++)
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2774 {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2775 uint32_t first = mode4_address_map[tile_address];
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2776 uint32_t last = mode4_address_map[tile_address + 2];
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2777 uint32_t pixels = planar_to_chunky[context->vdpmem[first]] << 1;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2778 pixels \|= planar_to_chunky[context->vdpmem[first+1]];
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2779 pixels \|= planar_to_chunky[context->vdpmem[last]] << 3;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2780 pixels \|= planar_to_chunky[context->vdpmem[last+1]] << 2;
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2781 pixel_t *out = line;
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2782 for (uint32_t i = i_init; i != i_limit; i += i_inc)
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2783 {
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2784 pixel_t pixel = context->colors[((pixels >> i & 0xF) \| pal) + MODE4_OFFSET];
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2785 *(out++) = pixel;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2786 *(out++) = pixel;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2787 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2788
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2789
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2790 if (y & 1) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2791 tile_address += tile_inc;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2792 }
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2793 line += pitch / sizeof(pixel_t);
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2794 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2795
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2796
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2797
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2798 col += 16;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2799 }
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2800 fb += 16 * pitch / sizeof(pixel_t);
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2801 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2802 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2803
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2804 static void sprite_debug_mode4(pixel_t fb, uint32_t pitch, vdp_context context)
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2805 {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2806 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2807
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2808 pixel_t tms_map_color(vdp_context *context, uint8_t color)
2612 7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2809 {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2810 if (context->type == VDP_GAMEGEAR) {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2811 //Game Gear uses CRAM entries 16-31 for TMS9918A modes
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2812 return context->colors[color + 16 + MODE4_OFFSET];
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2813 } else {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2814 color <<= 1;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2815 color = (color & 0xE) \| (color << 1 & 0x20);
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2816 return context->color_map[color \| FBUF_TMS];
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2817 }
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2818 }
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2819
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2820 static void plane_debug_tms(pixel_t fb, uint32_t pitch, vdp_context context)
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2821 {
2612 7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2822 uint16_t table_address = context->regs[REG_SCROLL_A] << 10 & 0x3C00;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2823 uint16_t color_address = context->regs[REG_COLOR_TABLE] << 6;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2824 uint16_t pattern_address = context->regs[REG_PATTERN_GEN] << 11 & 0x3800;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2825 uint16_t upper_vcounter_mask;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2826 uint16_t upper_vcounter_pmask;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2827 uint16_t pattern_name_mask;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2828 if (context->type > VDP_SMS2) {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2829 //SMS1 and TMS9918A
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2830 upper_vcounter_mask = color_address & 0x1800;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2831 upper_vcounter_pmask = pattern_address & 0x1800;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2832 pattern_name_mask = (color_address & 0x07C0) \| 0x0038;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2833 } else {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2834 //SMS2 and Game Gear
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2835 upper_vcounter_mask = 0x1800;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2836 upper_vcounter_pmask = 0x1800;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2837 pattern_name_mask = 0x07F8;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2838 }
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2839 uint32_t cols, pixels;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2840 if (context->regs[REG_MODE_2] & BIT_M1) {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2841 //Text mode
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2842 cols = 40;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2843 pixels = 12;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2844 } else {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2845 //Graphics/Multicolor
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2846 cols = 32;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2847 pixels = 16;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2848 }
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2849 uint32_t fg, bg;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2850 if (context->regs[REG_MODE_2] & BIT_M1) {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2851 //Text mode uses TC and BD colors
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2852 fg = tms_map_color(context, context->regs[REG_BG_COLOR] >> 4);
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2853 bg = tms_map_color(context, context->regs[REG_BG_COLOR] & 0xF);
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2854 }
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2855 for (uint32_t row = 0; row < 24; row++)
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2856 {
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2857 pixel_t *colfb = fb;
2612 7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2858 for (uint32_t col = 0; col < cols; col++)
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2859 {
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2860 pixel_t *linefb = colfb;
2612 7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2861 uint8_t pattern = context->vdpmem[mode4_address_map[table_address] ^ 1];
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2862 uint16_t caddress = color_address;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2863 uint16_t paddress = pattern_address;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2864 if (context->regs[REG_MODE_2] & BIT_M2) {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2865 } else {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2866 if (context->regs[REG_MODE_1] & BIT_M3) {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2867 //Graphics II
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2868 caddress &= 0x2000;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2869 paddress &= 0x2000;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2870 caddress \|= (row * 8) << 5 & upper_vcounter_mask;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2871 caddress \|= pattern << 3 & pattern_name_mask;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2872 paddress \|= (row * 8) << 5 & upper_vcounter_pmask;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2873 } else {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2874 caddress \|= pattern >> 3;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2875 }
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2876 paddress \|= pattern << 3 & 0x7F8;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2877 for (uint32_t y = 0; y < 16; y++)
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2878 {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2879 uint8_t bits = context->vdpmem[mode4_address_map[paddress] ^ 1];
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2880 if (!(context->regs[REG_MODE_2] & BIT_M1)) {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2881 uint8_t colors = context->vdpmem[mode4_address_map[caddress] ^ 1];
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2882 fg = tms_map_color(context, colors >> 4);
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2883 bg = tms_map_color(context, colors & 0xF);
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2884 }
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2885
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2886 pixel_t *curfb = linefb;
2612 7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2887 for (uint32_t x = 0; x < pixels; x++)
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2888 {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2889 *(curfb++) = (bits & 0x80) ? fg : bg;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2890 if (x & 1) {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2891 bits <<= 1;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2892 }
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2893 }
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2894 linefb += pitch / sizeof(pixel_t);
2612 7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2895 if (y & 1) {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2896 if (context->regs[REG_MODE_1] & BIT_M3) {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2897 caddress++;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2898 }
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2899 paddress++;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2900 }
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2901 }
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2902 }
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2903 table_address++;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2904 colfb += pixels;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2905 }
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2906 fb += 16 * pitch / sizeof(pixel_t);
2612 7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	2907 }
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2908 }
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2909
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2910 static void sprite_debug_tms(pixel_t fb, uint32_t pitch, vdp_context context)
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2911 {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2912 }
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2913
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2914 static void vdp_update_per_frame_debug(vdp_context *context)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2915 {
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2916 if (context->enabled_debuggers & (1 << DEBUG_PLANE)) {
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2917
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2918 uint32_t pitch;
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2919 pixel_t *fb = render_get_framebuffer(context->debug_fb_indices[DEBUG_PLANE], &pitch);
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2920 if (context->type == VDP_GENESIS && (context->regs[REG_MODE_2] & BIT_MODE_5)) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2921 if ((context->debug_modes[DEBUG_PLANE] & 3) == 3) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2922 sprite_debug_mode5(fb, pitch, context);
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2923 } else {
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2924 plane_debug_mode5(fb, pitch, context);
2569 80606ebec74c Add sprite "plane" to VDP plane debugger Michael Pavone <pavone@retrodev.com> parents: 2566 diff changeset	2925 }
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2926 } else if (context->type != VDP_TMS9918A && (context->regs[REG_MODE_1] & BIT_MODE_4)) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2927 if (context->debug_modes[DEBUG_PLANE] & 1) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2928 sprite_debug_mode4(fb, pitch, context);
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2929 } else {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2930 plane_debug_mode4(fb, pitch, context);
2569 80606ebec74c Add sprite "plane" to VDP plane debugger Michael Pavone <pavone@retrodev.com> parents: 2566 diff changeset	2931 }
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2932 } else if (context->type != VDP_GENESIS) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2933 if (context->debug_modes[DEBUG_PLANE] & 1) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2934 sprite_debug_tms(fb, pitch, context);
2569 80606ebec74c Add sprite "plane" to VDP plane debugger Michael Pavone <pavone@retrodev.com> parents: 2566 diff changeset	2935 } else {
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	2936 plane_debug_tms(fb, pitch, context);
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2937 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2938 }
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2939 render_framebuffer_updated(context->debug_fb_indices[DEBUG_PLANE], 1024);
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2940 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2941
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2942 if (context->enabled_debuggers & (1 << DEBUG_VRAM)) {
1634 e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2943 uint32_t pitch;
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2944 pixel_t *fb = render_get_framebuffer(context->debug_fb_indices[DEBUG_VRAM], &pitch);
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2945 if (context->type == VDP_GENESIS && (context->regs[REG_MODE_2] & BIT_MODE_5)) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2946 vram_debug_mode5(fb, pitch, context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2947 } else if (context->type != VDP_TMS9918A && (context->regs[REG_MODE_1] & BIT_MODE_4)) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2948 vram_debug_mode4(fb, pitch, context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2949 } else if (context->type != VDP_GENESIS) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2950 vram_debug_tms(fb, pitch, context);
1634 e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2951 }
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2952 render_framebuffer_updated(context->debug_fb_indices[DEBUG_VRAM], 1024);
1634 e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2953 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2954
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2955 if (context->enabled_debuggers & (1 << DEBUG_CRAM)) {
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2956 uint32_t starting_line = 512 - 32*4;
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2957 pixel_t *line = context->debug_fbs[DEBUG_CRAM]
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2958 + context->debug_fb_pitch[DEBUG_CRAM] * starting_line / sizeof(pixel_t);
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2959 pixel_t black = render_map_color(0, 0, 0);
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2960 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2961 for (int pal = 0; pal < 4; pal ++)
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2962 {
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2963 pixel_t *cur;
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2964 for (int y = 0; y < 31; y++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2965 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2966 cur = line;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2967 for (int offset = 0; offset < 16; offset++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2968 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2969 for (int x = 0; x < 31; x++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2970 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2971 (cur++) = context->colors[pal 16 + offset];
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2972 }
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2973 *(cur++) = black;
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2974 }
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2975 line += context->debug_fb_pitch[DEBUG_CRAM] / sizeof(pixel_t);
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2976 }
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2977 cur = line;
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2978 for (int x = 0; x < 512; x++)
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2979 {
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2980 *(cur++) = black;
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2981 }
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2982 line += context->debug_fb_pitch[DEBUG_CRAM] / sizeof(pixel_t);
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2983 }
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2984 } else {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2985 for (int pal = 0; pal < 2; pal ++)
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2986 {
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2987 pixel_t *cur;
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2988 for (int y = 0; y < 31; y++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2989 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2990 cur = line;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2991 for (int offset = MODE4_OFFSET; offset < MODE4_OFFSET + 16; offset++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2992 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2993 for (int x = 0; x < 31; x++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2994 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2995 (cur++) = context->colors[pal 16 + offset];
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2996 }
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2997 *(cur++) = black;
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2998 }
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	2999 line += context->debug_fb_pitch[DEBUG_CRAM] / sizeof(pixel_t);
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3000 }
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3001 cur = line;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3002 for (int x = 0; x < 512; x++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3003 {
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	3004 *(cur++) = black;
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3005 }
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	3006 line += context->debug_fb_pitch[DEBUG_CRAM] / sizeof(pixel_t);
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	3007 }
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	3008 }
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	3009 render_framebuffer_updated(context->debug_fb_indices[DEBUG_CRAM], 512);
0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	3010 context->debug_fbs[DEBUG_CRAM] = render_get_framebuffer(context->debug_fb_indices[DEBUG_CRAM], &context->debug_fb_pitch[DEBUG_CRAM]);
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	3011 }
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	3012 if (context->enabled_debuggers & (1 << DEBUG_COMPOSITE)) {
0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	3013 render_framebuffer_updated(context->debug_fb_indices[DEBUG_COMPOSITE], LINEBUF_SIZE);
0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	3014 context->debug_fbs[DEBUG_COMPOSITE] = render_get_framebuffer(context->debug_fb_indices[DEBUG_COMPOSITE], &context->debug_fb_pitch[DEBUG_COMPOSITE]);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3015 }
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3016 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3017
1629 079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	3018 void vdp_force_update_framebuffer(vdp_context *context)
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	3019 {
1897 59a83c21d9d2 Fix crash in 68K debugger from forced VDP frame update when framebuffer is not acquired Michael Pavone <pavone@retrodev.com> parents: 1894 diff changeset	3020 if (!context->fb) {
59a83c21d9d2 Fix crash in 68K debugger from forced VDP frame update when framebuffer is not acquired Michael Pavone <pavone@retrodev.com> parents: 1894 diff changeset	3021 return;
59a83c21d9d2 Fix crash in 68K debugger from forced VDP frame update when framebuffer is not acquired Michael Pavone <pavone@retrodev.com> parents: 1894 diff changeset	3022 }
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	3023 uint16_t lines_max = context->inactive_start + context->border_bot + context->border_top;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3024
1629 079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	3025 uint16_t to_fill = lines_max - context->output_lines;
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	3026 memset(
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	3027 ((char )context->fb) + context->output_pitch context->output_lines,
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	3028 0,
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	3029 to_fill * context->output_pitch
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	3030 );
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	3031 render_framebuffer_updated(context->cur_buffer, context->h40_lines > context->output_lines / 2 ? LINEBUF_SIZE : (256+HORIZ_BORDER));
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	3032 context->fb = render_get_framebuffer(context->cur_buffer, &context->output_pitch);
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3033 vdp_update_per_frame_debug(context);
1629 079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	3034 }
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	3035
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	3036 static void advance_output_line(vdp_context *context)
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	3037 {
1891 179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3038 //This function is kind of gross because of the need to deal with vertical border busting via mode changes
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	3039 uint16_t lines_max = context->inactive_start + context->border_bot + context->border_top;
1891 179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3040 uint32_t output_line = context->vcounter;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3041 if (!(context->regs[REG_MODE_2] & BIT_MODE_5)) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3042 //vcounter increment occurs much later in Mode 4
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3043 output_line++;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3044 }
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3045
1899 789746b1a1b3 Fix crash in OD2 Titancade scene when border is completely cropped by overscan settings Mike Pavone <pavone@retrodev.com> parents: 1897 diff changeset	3046 if (context->output_lines >= lines_max \|\| (!context->pushed_frame && output_line == context->inactive_start + context->border_top)) {
1891 179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3047 //we've either filled up a full frame or we're at the bottom of screen in the current defined mode + border crop
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	3048 if (!headless) {
1436 40c3be9f1af7 Fix timing of VDP ODD flag toggle Michael Pavone <pavone@retrodev.com> parents: 1432 diff changeset	3049 render_framebuffer_updated(context->cur_buffer, context->h40_lines > (context->inactive_start + context->border_top) / 2 ? LINEBUF_SIZE : (256+HORIZ_BORDER));
1891 179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3050 uint8_t is_even = context->flags2 & FLAG2_EVEN_FIELD;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3051 if (context->vcounter <= context->inactive_start && (context->regs[REG_MODE_4] & BIT_INTERLACE)) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3052 is_even = !is_even;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3053 }
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3054 context->cur_buffer = is_even ? FRAMEBUFFER_EVEN : FRAMEBUFFER_ODD;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3055 context->pushed_frame = 1;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3056 context->fb = NULL;
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	3057 }
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	3058 vdp_update_per_frame_debug(context);
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	3059 context->h40_lines = 0;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	3060 context->frame++;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	3061 context->output_lines = 0;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	3062 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3063
1891 179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3064 if (output_line < context->inactive_start + context->border_bot) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3065 if (context->output_lines) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3066 output_line = context->output_lines++;//context->border_top + context->vcounter;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3067 } else if (!output_line && !context->border_top) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3068 //top border is completely cropped so we won't hit the case below
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3069 output_line = 0;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3070 context->output_lines = 1;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3071 context->pushed_frame = 0;
2504 593a4f308335 Fix issue that was causing double frame output in Double Dragon 2 Michael Pavone <pavone@retrodev.com> parents: 2503 diff changeset	3072 } else if (!context->pushed_frame) {
1891 179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3073 context->output_lines = output_line + 1;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3074 }
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3075 } else if (output_line >= 0x200 - context->border_top) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3076 if (output_line == 0x200 - context->border_top) {
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	3077 //We're at the top of the display, force context->output_lines to be zero to avoid
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	3078 //potential screen rolling if the mode is changed at an inopportune time
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3079 context->output_lines = 0;
1891 179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3080 context->pushed_frame = 0;
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	3081 }
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	3082 output_line = context->output_lines++;//context->vcounter - (0x200 - context->border_top);
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	3083 } else {
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	3084 context->output = NULL;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	3085 return;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	3086 }
1891 179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3087 if (!context->fb) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3088 context->fb = render_get_framebuffer(context->cur_buffer, &context->output_pitch);
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3089 }
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	3090 output_line += context->top_offset;
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	3091 context->output = (pixel_t )(((char )context->fb) + context->output_pitch * output_line);
1271 c865ee5478bc Fix some of the framebuffer fill holes introduced by horizontal border changes Michael Pavone <pavone@retrodev.com> parents: 1270 diff changeset	3092 #ifdef DEBUG_FB_FILL
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	3093 for (int i = 0; i < LINEBUF_SIZE; i++)
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	3094 {
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	3095 context->output[i] = 0xFFFF00FF;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	3096 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3097 #endif
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	3098 if (context->output && (context->regs[REG_MODE_4] & BIT_H40)) {
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	3099 context->h40_lines++;
1077 1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode. Michael Pavone <pavone@retrodev.com> parents: 1076 diff changeset	3100 }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3101 }
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3102
1401 b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	3103 void vdp_release_framebuffer(vdp_context *context)
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	3104 {
1891 179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3105 if (context->fb) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3106 render_framebuffer_updated(context->cur_buffer, context->h40_lines > (context->inactive_start + context->border_top) / 2 ? LINEBUF_SIZE : (256+HORIZ_BORDER));
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3107 context->output = context->fb = NULL;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3108 }
1401 b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	3109 }
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	3110
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	3111 void vdp_reacquire_framebuffer(vdp_context *context)
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	3112 {
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	3113 uint16_t lines_max = context->inactive_start + context->border_bot + context->border_top;
1401 b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	3114 if (context->output_lines <= lines_max && context->output_lines > 0) {
1891 179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	3115 context->fb = render_get_framebuffer(context->cur_buffer, &context->output_pitch);
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	3116 context->output = (pixel_t )(((char )context->fb) + context->output_pitch * (context->output_lines - 1 + context->top_offset));
1401 b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	3117 } else {
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3118 context->output = NULL;
1401 b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	3119 }
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	3120 }
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	3121
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3122 static void render_border_garbage(vdp_context context, uint32_t address, uint8_t buf, uint8_t buf_off, uint16_t col)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3123 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3124 uint8_t base = col >> 9 & 0x30;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3125 for (int i = 0; i < 4; i++, address++)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3126 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3127 uint8_t byte = context->vdpmem[address & 0xFFFF];
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3128 buf[(buf_off++) & SCROLL_BUFFER_MASK] = base \| byte >> 4;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3129 buf[(buf_off++) & SCROLL_BUFFER_MASK] = base \| byte & 0xF;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3130 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3131 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3132
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3133 static void draw_right_border(vdp_context *context)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3134 {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3135 uint8_t *dst = context->compositebuf + BORDER_LEFT + ((context->regs[REG_MODE_4] & BIT_H40) ? 320 : 256);
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3136 uint8_t pixel = context->regs[REG_BG_COLOR] & 0x3F;
2675 dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	3137 if ((context->test_regs[0] & TEST_BIT_DISABLE) != 0) {
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3138 pixel = 0x3F;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3139 }
2675 dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	3140 uint8_t test_layer = context->test_regs[0] >> 7 & 3;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3141 if (test_layer) {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3142 switch(test_layer)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3143 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3144 case 1:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3145 memset(dst, 0, BORDER_RIGHT);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3146 dst += BORDER_RIGHT;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3147 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3148 case 2: {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3149 //plane A
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3150 //TODO: Deal with Window layer
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3151 int i;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3152 i = 0;
1888 bd60e74fd173 Fix regression in H32 from fine scroll optimization Michael Pavone <pavone@retrodev.com> parents: 1887 diff changeset	3153 uint8_t buf_off = context->buf_a_off - context->hscroll_a_fine;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3154 //uint8_t *src = context->tmp_buf_a + ((context->buf_a_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_a & 0xF))) & SCROLL_BUFFER_MASK);
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3155 for (; i < BORDER_RIGHT; buf_off++, i++, dst++)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3156 {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3157 *dst = context->tmp_buf_a[buf_off & SCROLL_BUFFER_MASK] & 0x3F;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3158 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3159 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3160 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3161 case 3: {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3162 //plane B
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3163 int i;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3164 i = 0;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3165 uint8_t buf_off = context->buf_b_off - (context->hscroll_b & 0xF);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3166 //uint8_t *src = context->tmp_buf_b + ((context->buf_b_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_b & 0xF))) & SCROLL_BUFFER_MASK);
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3167 for (; i < BORDER_RIGHT; buf_off++, i++, dst++)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3168 {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3169 *dst = context->tmp_buf_b[buf_off & SCROLL_BUFFER_MASK] & 0x3F;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3170 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3171 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3172 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3173 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3174 } else {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3175 memset(dst, 0, BORDER_RIGHT);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3176 dst += BORDER_RIGHT;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3177 }
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3178 context->done_composite = dst;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3179 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3180 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3181 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3182
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3183 #define CHECK_ONLY if (context->cycles >= target_cycles) { return; }
924 1b86268a4cb3 Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period Michael Pavone <pavone@retrodev.com> parents: 923 diff changeset	3184 #define CHECK_LIMIT if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } context->hslot++; context->cycles += slot_cycles; CHECK_ONLY
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3185 #define OUTPUT_PIXEL(slot) if ((slot) >= BG_START_SLOT) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3186 uint8_t src = context->compositebuf + ((slot) - BG_START_SLOT) 2;\
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	3187 pixel_t dst = context->output + ((slot) - BG_START_SLOT) 2;\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3188 if ((*src & 0x3F) \| test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3189 (dst++) = context->colors[(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3190 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3191 (dst++) = context->colors[((src++) & 0xC0) \| bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3192 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3193 if ((*src & 0x3F) \| test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3194 (dst++) = context->colors[(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3195 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3196 (dst++) = context->colors[((src++) & 0xC0) \| bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3197 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3198 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3199
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3200 #define OUTPUT_PIXEL_H40(slot) if (slot <= (BG_START_SLOT + LINEBUF_SIZE/2)) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3201 uint8_t src = context->compositebuf + (slot - BG_START_SLOT) 2;\
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	3202 pixel_t dst = context->output + (slot - BG_START_SLOT) 2;\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3203 if ((*src & 0x3F) \| test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3204 (dst++) = context->colors[(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3205 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3206 (dst++) = context->colors[((src++) & 0xC0) \| bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3207 }\
2241 48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	3208 if (slot == (BG_START_SLOT + LINEBUF_SIZE/2)) {\
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	3209 context->done_composite = NULL;\
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	3210 } else {\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3211 if ((*src & 0x3F) \| test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3212 (dst++) = context->colors[(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3213 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3214 (dst++) = context->colors[((src++) & 0xC0) \| bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3215 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3216 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3217 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3218
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3219 #define OUTPUT_PIXEL_H32(slot) if (slot <= (BG_START_SLOT + (256+HORIZ_BORDER)/2)) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3220 uint8_t src = context->compositebuf + (slot - BG_START_SLOT) 2;\
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	3221 pixel_t dst = context->output + (slot - BG_START_SLOT) 2;\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3222 if ((*src & 0x3F) \| test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3223 (dst++) = context->colors[(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3224 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3225 (dst++) = context->colors[((src++) & 0xC0) \| bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3226 }\
2241 48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	3227 if (slot == (BG_START_SLOT + (256+HORIZ_BORDER)/2)) {\
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	3228 context->done_composite = NULL;\
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	3229 } else {\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3230 if ((*src & 0x3F) \| test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3231 (dst++) = context->colors[(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3232 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3233 (dst++) = context->colors[((src++) & 0xC0) \| bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3234 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3235 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3236 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3237
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3238 //BG_START_SLOT => dst = 0, src = border
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3239 //BG_START_SLOT + 13/2=6, dst = 6, src = border + comp + 13
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3240 #define OUTPUT_PIXEL_MODE4(slot) if ((slot) >= BG_START_SLOT) {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3241 uint8_t src = context->compositebuf + ((slot) - BG_START_SLOT) 2;\
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	3242 pixel_t dst = context->output + ((slot) - BG_START_SLOT) 2;\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3243 if ((slot) - BG_START_SLOT < BORDER_LEFT/2) {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3244 *(dst++) = context->colors[bgindex];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3245 *(dst++) = context->colors[bgindex];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3246 } else if ((slot) - BG_START_SLOT < (BORDER_LEFT+256)/2){\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3247 if ((slot) - BG_START_SLOT == BORDER_LEFT/2) {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3248 *(dst++) = context->colors[bgindex];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3249 src++;\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3250 } else {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3251 (dst++) = context->colors[(src++)];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3252 }\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3253 (dst++) = context->colors[(src++)];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3254 } else if ((slot) - BG_START_SLOT <= (HORIZ_BORDER+256)/2) {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3255 *(dst++) = context->colors[bgindex];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3256 if ((slot) - BG_START_SLOT < (HORIZ_BORDER+256)/2) {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3257 *(dst++) = context->colors[bgindex];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3258 }\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3259 }\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3260 }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3261
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3262 #define COLUMN_RENDER_BLOCK(column, startcyc) \
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3263 case startcyc:\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3264 OUTPUT_PIXEL(startcyc)\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3265 read_map_scroll_a(column, context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3266 CHECK_LIMIT\
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3267 case ((startcyc+1)&0xFF):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3268 OUTPUT_PIXEL((startcyc+1)&0xFF)\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3269 external_slot(context);\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3270 CHECK_LIMIT\
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3271 case ((startcyc+2)&0xFF):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3272 OUTPUT_PIXEL((startcyc+2)&0xFF)\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3273 render_map_1(context);\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3274 CHECK_LIMIT\
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3275 case ((startcyc+3)&0xFF):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3276 OUTPUT_PIXEL((startcyc+3)&0xFF)\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3277 render_map_2(context);\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3278 CHECK_LIMIT\
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3279 case ((startcyc+4)&0xFF):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3280 OUTPUT_PIXEL((startcyc+4)&0xFF)\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3281 read_map_scroll_b(column, context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3282 CHECK_LIMIT\
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3283 case ((startcyc+5)&0xFF):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3284 OUTPUT_PIXEL((startcyc+5)&0xFF)\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3285 read_sprite_x(context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3286 CHECK_LIMIT\
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3287 case ((startcyc+6)&0xFF):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3288 OUTPUT_PIXEL((startcyc+6)&0xFF)\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3289 render_map_3(context);\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3290 CHECK_LIMIT\
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3291 case ((startcyc+7)&0xFF):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3292 OUTPUT_PIXEL((startcyc+7)&0xFF)\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3293 render_map_output(context->vcounter, column, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3294 CHECK_LIMIT
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3295
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3296 #define COLUMN_RENDER_BLOCK_REFRESH(column, startcyc) \
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3297 case startcyc:\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3298 OUTPUT_PIXEL(startcyc)\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3299 read_map_scroll_a(column, context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3300 CHECK_LIMIT\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3301 case (startcyc+1):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3302 /* refresh, so don't run dma src */\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3303 OUTPUT_PIXEL((startcyc+1)&0xFF)\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3304 context->hslot++;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3305 context->cycles += slot_cycles;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3306 CHECK_ONLY\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3307 case (startcyc+2):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3308 OUTPUT_PIXEL((startcyc+2)&0xFF)\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3309 render_map_1(context);\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3310 CHECK_LIMIT\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3311 case (startcyc+3):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3312 OUTPUT_PIXEL((startcyc+3)&0xFF)\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3313 render_map_2(context);\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3314 CHECK_LIMIT\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3315 case (startcyc+4):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3316 OUTPUT_PIXEL((startcyc+4)&0xFF)\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3317 read_map_scroll_b(column, context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3318 CHECK_LIMIT\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3319 case (startcyc+5):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3320 OUTPUT_PIXEL((startcyc+5)&0xFF)\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3321 read_sprite_x(context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3322 CHECK_LIMIT\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3323 case (startcyc+6):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3324 OUTPUT_PIXEL((startcyc+6)&0xFF)\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3325 render_map_3(context);\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3326 CHECK_LIMIT\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3327 case (startcyc+7):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3328 OUTPUT_PIXEL((startcyc+7)&0xFF)\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3329 render_map_output(context->vcounter, column, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3330 CHECK_LIMIT
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3331
2686 05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3332 #define COLUMN_RENDER_BLOCK_PHONY(column, startcyc) \
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3333 case startcyc:\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3334 CHECK_LIMIT\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3335 case ((startcyc+1)&0xFF):\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3336 external_slot(context);\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3337 CHECK_LIMIT\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3338 case ((startcyc+2)&0xFF):\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3339 CHECK_LIMIT\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3340 case ((startcyc+3)&0xFF):\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3341 CHECK_LIMIT\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3342 case ((startcyc+4)&0xFF):\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3343 CHECK_LIMIT\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3344 case ((startcyc+5)&0xFF):\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3345 read_sprite_x(context->vcounter, context);\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3346 CHECK_LIMIT\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3347 case ((startcyc+6)&0xFF):\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3348 CHECK_LIMIT\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3349 case ((startcyc+7)&0xFF):\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3350 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3351
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3352 #define COLUMN_RENDER_BLOCK_REFRESH_PHONY(column, startcyc) \
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3353 case startcyc:\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3354 CHECK_LIMIT\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3355 case (startcyc+1):\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3356 /* refresh, so don't run dma src */\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3357 context->hslot++;\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3358 context->cycles += slot_cycles;\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3359 CHECK_ONLY\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3360 case (startcyc+2):\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3361 CHECK_LIMIT\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3362 case (startcyc+3):\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3363 CHECK_LIMIT\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3364 case (startcyc+4):\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3365 CHECK_LIMIT\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3366 case (startcyc+5):\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3367 read_sprite_x(context->vcounter, context);\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3368 CHECK_LIMIT\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3369 case (startcyc+6):\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3370 CHECK_LIMIT\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3371 case (startcyc+7):\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3372 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3373
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3374 #define COLUMN_RENDER_BLOCK_MODE4(column, startcyc) \
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3375 case startcyc:\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3376 OUTPUT_PIXEL_MODE4(startcyc)\
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3377 read_map_mode4(column, context->vcounter, context);\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3378 CHECK_LIMIT\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3379 case ((startcyc+1)&0xFF):\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3380 OUTPUT_PIXEL_MODE4((startcyc+1)&0xFF)\
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3381 if (column & 3) {\
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3382 scan_sprite_table_mode4(context);\
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3383 } else {\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3384 external_slot(context);\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3385 }\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3386 CHECK_LIMIT\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3387 case ((startcyc+2)&0xFF):\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3388 OUTPUT_PIXEL_MODE4((startcyc+2)&0xFF)\
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3389 fetch_map_mode4(column, context->vcounter, context);\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3390 CHECK_LIMIT\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3391 case ((startcyc+3)&0xFF):\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3392 OUTPUT_PIXEL_MODE4((startcyc+3)&0xFF)\
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3393 render_map_mode4(context->vcounter, column, context);\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3394 CHECK_LIMIT
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3395
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3396 #define CHECK_LIMIT_HSYNC(slot) \
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3397 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3398 if (slot >= HSYNC_SLOT_H40 && slot < HSYNC_END_H40) {\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3399 context->cycles += h40_hsync_cycles[slot - HSYNC_SLOT_H40];\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3400 } else {\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3401 context->cycles += slot_cycles;\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3402 }\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3403 if (slot == 182) {\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3404 context->hslot = 229;\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3405 } else {\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3406 context->hslot++;\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3407 }\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3408 CHECK_ONLY
884 252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 822 diff changeset	3409
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3410 #define SPRITE_RENDER_H40(slot) \
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3411 case slot:\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3412 OUTPUT_PIXEL_H40(slot)\
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	3413 if ((slot) == BG_START_SLOT + LINEBUF_SIZE/2) {\
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	3414 advance_output_line(context);\
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3415 if (!context->output) {\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3416 context->output = dummy_buffer;\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3417 }\
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	3418 }\
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3419 render_sprite_cells( context);\
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3420 if (slot == 168 \|\| slot == 247 \|\| slot == 248) {\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3421 render_border_garbage(\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3422 context,\
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3423 context->serial_address,\
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3424 context->tmp_buf_b,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3425 context->buf_b_off + (slot == 247 ? 0 : 8),\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3426 slot == 247 ? context->col_1 : context->col_2\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3427 );\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3428 if (slot == 248) {\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3429 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3430 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3431 }\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3432 } else if (slot == 243) {\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3433 render_border_garbage(\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3434 context,\
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3435 context->serial_address,\
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3436 context->tmp_buf_a,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3437 context->buf_a_off,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3438 context->col_1\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3439 );\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3440 } else if (slot == 169) {\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3441 draw_right_border(context);\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3442 }\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3443 scan_sprite_table(context->vcounter, context);\
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3444 CHECK_LIMIT_HSYNC(slot)
884 252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 822 diff changeset	3445
2686 05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3446 #define SPRITE_RENDER_H40_PHONY(slot) \
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3447 case slot:\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3448 render_sprite_cells( context);\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3449 scan_sprite_table(context->vcounter, context);\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3450 CHECK_LIMIT_HSYNC(slot)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3451
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	3452 //Note that the line advancement check will fail if BG_START_SLOT is > 6
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	3453 //as we're bumping up against the hcounter jump
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3454 #define SPRITE_RENDER_H32(slot) \
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3455 case slot:\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3456 OUTPUT_PIXEL_H32(slot)\
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	3457 if ((slot) == BG_START_SLOT + (256+HORIZ_BORDER)/2) {\
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	3458 advance_output_line(context);\
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3459 if (!context->output) {\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3460 context->output = dummy_buffer;\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3461 }\
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	3462 }\
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3463 render_sprite_cells( context);\
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3464 if (slot == 136 \|\| slot == 247 \|\| slot == 248) {\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3465 render_border_garbage(\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3466 context,\
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3467 context->serial_address,\
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3468 context->tmp_buf_b,\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3469 context->buf_b_off + (slot == 247 ? 0 : 8),\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3470 slot == 247 ? context->col_1 : context->col_2\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3471 );\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3472 if (slot == 248) {\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3473 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3474 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3475 }\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3476 } else if (slot == 137) {\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3477 draw_right_border(context);\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3478 }\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3479 scan_sprite_table(context->vcounter, context);\
924 1b86268a4cb3 Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period Michael Pavone <pavone@retrodev.com> parents: 923 diff changeset	3480 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3481 if (slot == 147) {\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3482 context->hslot = 233;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3483 } else {\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3484 context->hslot++;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3485 }\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3486 context->cycles += slot_cycles;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3487 CHECK_ONLY
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3488
2686 05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3489 #define SPRITE_RENDER_H32_PHONY(slot) \
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3490 case slot:\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3491 render_sprite_cells( context);\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3492 scan_sprite_table(context->vcounter, context);\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3493 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3494 if (slot == 147) {\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3495 context->hslot = 233;\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3496 } else {\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3497 context->hslot++;\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3498 }\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3499 context->cycles += slot_cycles;\
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3500 CHECK_ONLY
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3501
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3502 #define MODE4_CHECK_SLOT_LINE(slot) \
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3503 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	3504 if ((slot) == BG_START_SLOT + (256+HORIZ_BORDER)/2) {\
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	3505 advance_output_line(context);\
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3506 if (!context->output) {\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3507 context->output = dummy_buffer;\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3508 }\
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	3509 }\
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3510 if ((slot) == 147) {\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3511 context->hslot = 233;\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3512 } else {\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3513 context->hslot++;\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3514 }\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3515 context->cycles += slot_cycles;\
1163 b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases Michael Pavone <pavone@retrodev.com> parents: 1161 diff changeset	3516 if ((slot+1) == LINE_CHANGE_MODE4) {\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases Michael Pavone <pavone@retrodev.com> parents: 1161 diff changeset	3517 vdp_advance_line(context);\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases Michael Pavone <pavone@retrodev.com> parents: 1161 diff changeset	3518 if (context->vcounter == 192) {\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases Michael Pavone <pavone@retrodev.com> parents: 1161 diff changeset	3519 return;\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases Michael Pavone <pavone@retrodev.com> parents: 1161 diff changeset	3520 }\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases Michael Pavone <pavone@retrodev.com> parents: 1161 diff changeset	3521 }\
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3522 CHECK_ONLY
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	3523
c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	3524 #define CALC_SLOT(slot, increment) ((slot+increment) > 147 && (slot+increment) < 233 ? (slot+increment-148+233): (slot+increment))
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3525
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3526 #define SPRITE_RENDER_H32_MODE4(slot) \
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3527 case slot:\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3528 OUTPUT_PIXEL_MODE4(slot)\
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3529 read_sprite_x_mode4(context);\
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3530 MODE4_CHECK_SLOT_LINE(slot)\
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	3531 case CALC_SLOT(slot, 1):\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3532 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 1))\
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3533 read_sprite_x_mode4(context);\
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	3534 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot,1))\
c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	3535 case CALC_SLOT(slot, 2):\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3536 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 2))\
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3537 fetch_sprite_cells_mode4(context);\
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	3538 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 2))\
c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	3539 case CALC_SLOT(slot, 3):\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3540 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 3))\
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3541 render_sprite_cells_mode4(context);\
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	3542 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 3))\
c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	3543 case CALC_SLOT(slot, 4):\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3544 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 4))\
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3545 fetch_sprite_cells_mode4(context);\
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	3546 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 4))\
c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	3547 case CALC_SLOT(slot, 5):\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3548 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 5))\
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3549 render_sprite_cells_mode4(context);\
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	3550 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 5))
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3551
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	3552 static pixel_t dummy_buffer[LINEBUF_SIZE];
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3553 static void vdp_h40_line(vdp_context * context)
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3554 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3555 uint16_t address;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3556 uint32_t mask;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3557 uint32_t const slot_cycles = MCLKS_SLOT_H40;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3558 uint8_t bgindex = context->regs[REG_BG_COLOR] & 0x3F;
2675 dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	3559 uint8_t test_layer = context->test_regs[0] >> 7 & 3;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3560
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3561 //165
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3562 if (!(context->regs[REG_MODE_3] & BIT_VSCROLL)) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3563 //TODO: Develop some tests on hardware to see when vscroll latch actually happens for full plane mode
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3564 //See note in vdp_h32 for why this was originally moved out of read_map_scroll
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3565 //Skitchin' has a similar problem, but uses H40 mode. It seems to be able to hit the extern slot at 232
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3566 //pretty consistently
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3567 context->vscroll_latch[0] = context->vsram[0];
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3568 context->vscroll_latch[1] = context->vsram[1];
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3569 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3570 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3571 //166
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3572 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3573 //167
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3574 context->sprite_index = 0x80;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3575 context->slot_counter = 0;
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3576 render_sprite_cells(context);
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3577 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3578 context,
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3579 context->serial_address,
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3580 context->tmp_buf_b, context->buf_b_off,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3581 context->col_1
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3582 );
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3583 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3584 //168
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3585 render_sprite_cells(context);
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3586 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3587 context,
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3588 context->serial_address,
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3589 context->tmp_buf_b,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3590 context->buf_b_off + 8,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3591 context->col_2
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3592 );
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3593 scan_sprite_table(context->vcounter, context);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3594
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3595 //Do palette lookup for end of previous line
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3596 uint8_t src = context->compositebuf + (LINE_CHANGE_H40 - BG_START_SLOT) 2;
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	3597 pixel_t dst = context->output + (LINE_CHANGE_H40 - BG_START_SLOT) 2;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3598 if (context->output) {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3599 if (test_layer) {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3600 for (int i = 0; i < LINEBUF_SIZE - (LINE_CHANGE_H40 - BG_START_SLOT) * 2; i++)
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3601 {
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3602 (dst++) = context->colors[(src++)];
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3603 }
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3604 } else {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3605 for (int i = 0; i < LINEBUF_SIZE - (LINE_CHANGE_H40 - BG_START_SLOT) * 2; i++)
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3606 {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3607 if (*src & 0x3F) {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3608 (dst++) = context->colors[(src++)];
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3609 } else {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3610 (dst++) = context->colors[((src++) & 0xC0) \| bgindex];
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3611 }
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3612 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3613 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3614 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3615 advance_output_line(context);
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3616 //169-242 (inclusive)
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3617 for (int i = 0; i < 27; i++)
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3618 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3619 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3620 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3621 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3622 //243
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3623 render_sprite_cells(context);
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3624 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3625 context,
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3626 context->serial_address,
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3627 context->tmp_buf_a,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3628 context->buf_a_off,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3629 context->col_1
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3630 );
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3631 scan_sprite_table(context->vcounter, context);
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3632 //244
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3633 address = (context->regs[REG_HSCROLL] & 0x3F) << 10;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3634 mask = 0;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3635 if (context->regs[REG_MODE_3] & 0x2) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3636 mask \|= 0xF8;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3637 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3638 if (context->regs[REG_MODE_3] & 0x1) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3639 mask \|= 0x7;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3640 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3641 render_border_garbage(context, address, context->tmp_buf_a, context->buf_a_off+8, context->col_2);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3642 address += (context->vcounter & mask) * 4;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3643 context->hscroll_a = context->vdpmem[address] << 8 \| context->vdpmem[address+1];
1885 4178ce857e87 Calculate fine scroll once per line for a small speedup Michael Pavone <pavone@retrodev.com> parents: 1884 diff changeset	3644 context->hscroll_a_fine = context->hscroll_a & 0xF;
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3645 context->hscroll_b = context->vdpmem[address+2] << 8 \| context->vdpmem[address+3];
1885 4178ce857e87 Calculate fine scroll once per line for a small speedup Michael Pavone <pavone@retrodev.com> parents: 1884 diff changeset	3646 context->hscroll_b_fine = context->hscroll_b & 0xF;
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3647 //printf("%d: HScroll A: %d, HScroll B: %d\n", context->vcounter, context->hscroll_a, context->hscroll_b);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3648 //243-246 inclusive
1877 9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization Michael Pavone <pavone@retrodev.com> parents: 1875 diff changeset	3649 for (int i = 0; i < 3; i++)
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3650 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3651 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3652 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3653 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3654 //247
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3655 render_sprite_cells(context);
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3656 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3657 context,
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3658 context->serial_address,
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3659 context->tmp_buf_b,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3660 context->buf_b_off,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3661 context->col_1
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3662 );
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3663 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3664 //248
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3665
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3666 render_sprite_cells(context);
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3667 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3668 context,
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3669 context->serial_address,
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3670 context->tmp_buf_b,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3671 context->buf_b_off + 8,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3672 context->col_2
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3673 );
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3674 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3675 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3676 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3677 //250
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3678 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3679 scan_sprite_table(context->vcounter, context);
1877 9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization Michael Pavone <pavone@retrodev.com> parents: 1875 diff changeset	3680 //251
9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization Michael Pavone <pavone@retrodev.com> parents: 1875 diff changeset	3681 scan_sprite_table(context->vcounter, context);//Just a guess
9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization Michael Pavone <pavone@retrodev.com> parents: 1875 diff changeset	3682 //252
9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization Michael Pavone <pavone@retrodev.com> parents: 1875 diff changeset	3683 scan_sprite_table(context->vcounter, context);//Just a guess
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3684 //254
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3685 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3686 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3687 //255
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3688 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3689 //0
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3690 scan_sprite_table(context->vcounter, context);//Just a guess
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3691 //seems like the sprite table scan fills a shift register
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3692 //values are FIFO, but unused slots precede used slots
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3693 //so we set cur_slot to slot_counter and let it wrap around to
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3694 //the beginning of the list
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3695 context->cur_slot = context->slot_counter;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3696 context->sprite_x_offset = 0;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3697 context->sprite_draws = MAX_SPRITES_LINE;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3698 //background planes and layer compositing
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3699 for (int col = 0; col < 42; col+=2)
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3700 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3701 read_map_scroll_a(col, context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3702 render_map_1(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3703 render_map_2(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3704 read_map_scroll_b(col, context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3705 render_map_3(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3706 render_map_output(context->vcounter, col, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3707 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3708 //sprite rendering phase 2
1877 9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization Michael Pavone <pavone@retrodev.com> parents: 1875 diff changeset	3709 for (int i = 0; i < MAX_SPRITES_LINE; i++)
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3710 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3711 read_sprite_x(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3712 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3713 //163
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3714 context->cur_slot = MAX_SPRITES_LINE-1;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3715 memset(context->linebuf, 0, LINEBUF_SIZE);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3716 context->flags &= ~FLAG_MASKED;
2564 553a0b4888db More robust sprite overflow regression fix Michael Pavone <pavone@retrodev.com> parents: 2563 diff changeset	3717 while (context->sprite_draws) {
553a0b4888db More robust sprite overflow regression fix Michael Pavone <pavone@retrodev.com> parents: 2563 diff changeset	3718 context->sprite_draws--;
553a0b4888db More robust sprite overflow regression fix Michael Pavone <pavone@retrodev.com> parents: 2563 diff changeset	3719 context->sprite_draw_list[context->sprite_draws].x_pos = 0;
2563 f51d750b4d06 Fix sprite overflow regression in Super Hang-On and other games Michael Pavone <pavone@retrodev.com> parents: 2559 diff changeset	3720 }
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3721 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3722 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3723 context,
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3724 context->serial_address,
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3725 context->tmp_buf_a, context->buf_a_off,
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3726 context->col_1
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3727 );
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3728 //164
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3729 render_sprite_cells(context);
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3730 render_border_garbage(
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3731 context,
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3732 context->serial_address,
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3733 context->tmp_buf_a, context->buf_a_off + 8,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3734 context->col_2
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3735 );
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3736 context->cycles += MCLKS_LINE;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3737 vdp_advance_line(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3738 src = context->compositebuf;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3739 if (!context->output) {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3740 return;
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3741 }
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3742 dst = context->output;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3743 if (test_layer) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3744 for (int i = 0; i < (LINE_CHANGE_H40 - BG_START_SLOT) * 2; i++)
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3745 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3746 (dst++) = context->colors[(src++)];
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3747 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3748 } else {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3749 for (int i = 0; i < (LINE_CHANGE_H40 - BG_START_SLOT) * 2; i++)
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3750 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3751 if (*src & 0x3F) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3752 (dst++) = context->colors[(src++)];
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3753 } else {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3754 (dst++) = context->colors[((src++) & 0xC0) \| bgindex];
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3755 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3756 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3757 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3758 }
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	3759 static void vdp_h40(vdp_context * context, uint32_t target_cycles)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3760 {
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3761 uint16_t address;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3762 uint32_t mask;
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3763 uint32_t const slot_cycles = MCLKS_SLOT_H40;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3764 uint8_t bgindex = context->regs[REG_BG_COLOR] & 0x3F;
2675 dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	3765 uint8_t test_layer = context->test_regs[0] >> 7 & 3;
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3766 if (!context->output) {
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3767 //This shouldn't happen normally, but it can theoretically
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3768 //happen when doing border busting
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3769 context->output = dummy_buffer;
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3770 }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3771 switch(context->hslot)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3772 {
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3773 for (;;)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3774 {
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3775 case 165:
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3776 //only consider doing a line at a time if the FIFO is empty, there are no pending reads and there is no DMA running
1925 039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes Michael Pavone <pavone@retrodev.com> parents: 1917 diff changeset	3777 if (context->fifo_read == -1 && !(context->flags & FLAG_DMA_RUN) && ((context->cd & 1) \|\| (context->flags & FLAG_READ_FETCHED))) {
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3778 while (target_cycles - context->cycles >= MCLKS_LINE && context->state != PREPARING && context->vcounter != context->inactive_start) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3779 vdp_h40_line(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3780 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3781 CHECK_ONLY
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3782 if (!context->output) {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3783 //This shouldn't happen normally, but it can theoretically
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3784 //happen when doing border busting
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3785 context->output = dummy_buffer;
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3786 }
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3787 }
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3788 OUTPUT_PIXEL(165)
1432 5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	3789 if (!(context->regs[REG_MODE_3] & BIT_VSCROLL)) {
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	3790 //TODO: Develop some tests on hardware to see when vscroll latch actually happens for full plane mode
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	3791 //See note in vdp_h32 for why this was originally moved out of read_map_scroll
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	3792 //Skitchin' has a similar problem, but uses H40 mode. It seems to be able to hit the extern slot at 232
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	3793 //pretty consistently
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	3794 context->vscroll_latch[0] = context->vsram[0];
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	3795 context->vscroll_latch[1] = context->vsram[1];
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	3796 }
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3797 if (context->state == PREPARING) {
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3798 external_slot(context);
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3799 } else {
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3800 render_sprite_cells(context);
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3801 }
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3802 CHECK_LIMIT
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3803 case 166:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3804 OUTPUT_PIXEL(166)
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3805 if (context->state == PREPARING) {
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3806 external_slot(context);
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3807 } else {
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3808 render_sprite_cells(context);
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3809 }
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3810 if (context->vcounter == context->inactive_start) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3811 context->hslot++;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3812 context->cycles += slot_cycles;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3813 return;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3814 }
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3815 CHECK_LIMIT
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3816 //sprite attribute table scan starts
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3817 case 167:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3818 OUTPUT_PIXEL(167)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3819 context->sprite_index = 0x80;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	3820 context->slot_counter = 0;
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3821 render_sprite_cells(context);
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3822 render_border_garbage(
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3823 context,
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3824 context->serial_address,
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3825 context->tmp_buf_b, context->buf_b_off,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3826 context->col_1
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3827 );
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3828 scan_sprite_table(context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3829 CHECK_LIMIT
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3830 SPRITE_RENDER_H40(168)
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3831 SPRITE_RENDER_H40(169)
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3832 SPRITE_RENDER_H40(170)
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3833 SPRITE_RENDER_H40(171)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3834 SPRITE_RENDER_H40(172)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3835 SPRITE_RENDER_H40(173)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3836 SPRITE_RENDER_H40(174)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3837 SPRITE_RENDER_H40(175)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3838 SPRITE_RENDER_H40(176)
1365 6dd2c3edd0b5 Add a bit of a hack to HINT start cycle to give correct values in my test ROM and further improve prevelance of CRAM dot noise in Outrunners and OD2 Michael Pavone <pavone@retrodev.com> parents: 1362 diff changeset	3839 SPRITE_RENDER_H40(177)//End of border?
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3840 SPRITE_RENDER_H40(178)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3841 SPRITE_RENDER_H40(179)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3842 SPRITE_RENDER_H40(180)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3843 SPRITE_RENDER_H40(181)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3844 SPRITE_RENDER_H40(182)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3845 SPRITE_RENDER_H40(229)
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3846 //!HSYNC asserted
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3847 SPRITE_RENDER_H40(230)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3848 SPRITE_RENDER_H40(231)
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3849 case 232:
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3850 external_slot(context);
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3851 CHECK_LIMIT_HSYNC(232)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3852 SPRITE_RENDER_H40(233)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3853 SPRITE_RENDER_H40(234)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3854 SPRITE_RENDER_H40(235)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3855 SPRITE_RENDER_H40(236)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3856 SPRITE_RENDER_H40(237)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3857 SPRITE_RENDER_H40(238)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3858 SPRITE_RENDER_H40(239)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3859 SPRITE_RENDER_H40(240)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3860 SPRITE_RENDER_H40(241)
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3861 SPRITE_RENDER_H40(242)
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3862 SPRITE_RENDER_H40(243) //provides "garbage" for border when plane A selected
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3863 case 244:
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3864 address = (context->regs[REG_HSCROLL] & 0x3F) << 10;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3865 mask = 0;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3866 if (context->regs[REG_MODE_3] & 0x2) {
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3867 mask \|= 0xF8;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3868 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3869 if (context->regs[REG_MODE_3] & 0x1) {
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3870 mask \|= 0x7;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3871 }
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3872 render_border_garbage(context, address, context->tmp_buf_a, context->buf_a_off+8, context->col_2);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3873 address += (context->vcounter & mask) * 4;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3874 context->hscroll_a = context->vdpmem[address] << 8 \| context->vdpmem[address+1];
1885 4178ce857e87 Calculate fine scroll once per line for a small speedup Michael Pavone <pavone@retrodev.com> parents: 1884 diff changeset	3875 context->hscroll_a_fine = context->hscroll_a & 0xF;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3876 context->hscroll_b = context->vdpmem[address+2] << 8 \| context->vdpmem[address+3];
1885 4178ce857e87 Calculate fine scroll once per line for a small speedup Michael Pavone <pavone@retrodev.com> parents: 1884 diff changeset	3877 context->hscroll_b_fine = context->hscroll_b & 0xF;
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3878 //printf("%d: HScroll A: %d, HScroll B: %d\n", context->vcounter, context->hscroll_a, context->hscroll_b);
924 1b86268a4cb3 Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period Michael Pavone <pavone@retrodev.com> parents: 923 diff changeset	3879 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3880 context->hslot++;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3881 context->cycles += h40_hsync_cycles[14];
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3882 CHECK_ONLY //provides "garbage" for border when plane A selected
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3883 //!HSYNC high
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3884 SPRITE_RENDER_H40(245)
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3885 SPRITE_RENDER_H40(246)
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3886 SPRITE_RENDER_H40(247) //provides "garbage" for border when plane B selected
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3887 SPRITE_RENDER_H40(248) //provides "garbage" for border when plane B selected
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3888 case 249:
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3889 read_map_scroll_a(0, context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3890 CHECK_LIMIT
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3891 SPRITE_RENDER_H40(250)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3892 case 251:
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3893 render_map_1(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3894 scan_sprite_table(context->vcounter, context);//Just a guess
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3895 CHECK_LIMIT
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3896 case 252:
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3897 render_map_2(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3898 scan_sprite_table(context->vcounter, context);//Just a guess
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3899 CHECK_LIMIT
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3900 case 253:
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3901 read_map_scroll_b(0, context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3902 CHECK_LIMIT
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3903 SPRITE_RENDER_H40(254)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3904 case 255:
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3905 render_map_3(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3906 scan_sprite_table(context->vcounter, context);//Just a guess
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3907 CHECK_LIMIT
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3908 case 0:
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3909 render_map_output(context->vcounter, 0, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3910 scan_sprite_table(context->vcounter, context);//Just a guess
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	3911 //seems like the sprite table scan fills a shift register
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	3912 //values are FIFO, but unused slots precede used slots
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	3913 //so we set cur_slot to slot_counter and let it wrap around to
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	3914 //the beginning of the list
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	3915 context->cur_slot = context->slot_counter;
1871 e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	3916 context->sprite_x_offset = 0;
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	3917 context->sprite_draws = MAX_SPRITES_LINE;
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3918 CHECK_LIMIT
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3919 COLUMN_RENDER_BLOCK(2, 1)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3920 COLUMN_RENDER_BLOCK(4, 9)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3921 COLUMN_RENDER_BLOCK(6, 17)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3922 COLUMN_RENDER_BLOCK_REFRESH(8, 25)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3923 COLUMN_RENDER_BLOCK(10, 33)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3924 COLUMN_RENDER_BLOCK(12, 41)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3925 COLUMN_RENDER_BLOCK(14, 49)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3926 COLUMN_RENDER_BLOCK_REFRESH(16, 57)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3927 COLUMN_RENDER_BLOCK(18, 65)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3928 COLUMN_RENDER_BLOCK(20, 73)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3929 COLUMN_RENDER_BLOCK(22, 81)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3930 COLUMN_RENDER_BLOCK_REFRESH(24, 89)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3931 COLUMN_RENDER_BLOCK(26, 97)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3932 COLUMN_RENDER_BLOCK(28, 105)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3933 COLUMN_RENDER_BLOCK(30, 113)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3934 COLUMN_RENDER_BLOCK_REFRESH(32, 121)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3935 COLUMN_RENDER_BLOCK(34, 129)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3936 COLUMN_RENDER_BLOCK(36, 137)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3937 COLUMN_RENDER_BLOCK(38, 145)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3938 COLUMN_RENDER_BLOCK_REFRESH(40, 153)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3939 case 161:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3940 OUTPUT_PIXEL(161)
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3941 external_slot(context);
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3942 CHECK_LIMIT
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3943 case 162:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3944 OUTPUT_PIXEL(162)
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3945 external_slot(context);
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3946 CHECK_LIMIT
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3947 //sprite render to line buffer starts
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3948 case 163:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3949 OUTPUT_PIXEL(163)
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	3950 context->cur_slot = MAX_SPRITES_LINE-1;
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3951 memset(context->linebuf, 0, LINEBUF_SIZE);
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	3952 context->flags &= ~FLAG_MASKED;
2564 553a0b4888db More robust sprite overflow regression fix Michael Pavone <pavone@retrodev.com> parents: 2563 diff changeset	3953 while (context->sprite_draws) {
553a0b4888db More robust sprite overflow regression fix Michael Pavone <pavone@retrodev.com> parents: 2563 diff changeset	3954 context->sprite_draws--;
553a0b4888db More robust sprite overflow regression fix Michael Pavone <pavone@retrodev.com> parents: 2563 diff changeset	3955 context->sprite_draw_list[context->sprite_draws].x_pos = 0;
2563 f51d750b4d06 Fix sprite overflow regression in Super Hang-On and other games Michael Pavone <pavone@retrodev.com> parents: 2559 diff changeset	3956 }
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3957 render_sprite_cells(context);
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3958 render_border_garbage(
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3959 context,
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3960 context->serial_address,
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3961 context->tmp_buf_a, context->buf_a_off,
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3962 context->col_1
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3963 );
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3964 CHECK_LIMIT
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3965 case 164:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3966 OUTPUT_PIXEL(164)
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3967 render_sprite_cells(context);
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3968 render_border_garbage(
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3969 context,
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	3970 context->serial_address,
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3971 context->tmp_buf_a, context->buf_a_off + 8,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3972 context->col_2
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3973 );
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3974 if (context->flags & FLAG_DMA_RUN) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3975 run_dma_src(context, -1);
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3976 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3977 context->hslot++;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3978 context->cycles += slot_cycles;
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3979 vdp_advance_line(context);
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3980 CHECK_ONLY
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3981 }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3982 default:
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3983 context->hslot++;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3984 context->cycles += slot_cycles;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3985 return;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3986 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3987 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3988
2686 05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3989 static void vdp_h40_phony(vdp_context * context, uint32_t target_cycles)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3990 {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3991 uint32_t const slot_cycles = MCLKS_SLOT_H40;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3992 switch(context->hslot)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3993 {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3994 for (;;)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3995 {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3996 case 165:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3997 if (context->state == PREPARING) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3998 external_slot(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	3999 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4000 render_sprite_cells(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4001 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4002 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4003 case 166:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4004 if (context->state == PREPARING) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4005 external_slot(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4006 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4007 render_sprite_cells(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4008 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4009 if (context->vcounter == context->inactive_start) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4010 context->hslot++;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4011 context->cycles += slot_cycles;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4012 return;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4013 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4014 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4015 //sprite attribute table scan starts
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4016 case 167:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4017 context->sprite_index = 0x80;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4018 context->slot_counter = 0;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4019 render_sprite_cells(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4020 scan_sprite_table(context->vcounter, context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4021 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4022 SPRITE_RENDER_H40_PHONY(168)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4023 SPRITE_RENDER_H40_PHONY(169)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4024 SPRITE_RENDER_H40_PHONY(170)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4025 SPRITE_RENDER_H40_PHONY(171)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4026 SPRITE_RENDER_H40_PHONY(172)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4027 SPRITE_RENDER_H40_PHONY(173)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4028 SPRITE_RENDER_H40_PHONY(174)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4029 SPRITE_RENDER_H40_PHONY(175)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4030 SPRITE_RENDER_H40_PHONY(176)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4031 SPRITE_RENDER_H40_PHONY(177)//End of border?
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4032 SPRITE_RENDER_H40_PHONY(178)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4033 SPRITE_RENDER_H40_PHONY(179)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4034 SPRITE_RENDER_H40_PHONY(180)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4035 SPRITE_RENDER_H40_PHONY(181)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4036 SPRITE_RENDER_H40_PHONY(182)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4037 SPRITE_RENDER_H40_PHONY(229)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4038 //!HSYNC asserted
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4039 SPRITE_RENDER_H40_PHONY(230)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4040 SPRITE_RENDER_H40_PHONY(231)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4041 case 232:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4042 external_slot(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4043 CHECK_LIMIT_HSYNC(232)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4044 SPRITE_RENDER_H40_PHONY(233)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4045 SPRITE_RENDER_H40_PHONY(234)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4046 SPRITE_RENDER_H40_PHONY(235)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4047 SPRITE_RENDER_H40_PHONY(236)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4048 SPRITE_RENDER_H40_PHONY(237)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4049 SPRITE_RENDER_H40_PHONY(238)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4050 SPRITE_RENDER_H40_PHONY(239)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4051 SPRITE_RENDER_H40_PHONY(240)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4052 SPRITE_RENDER_H40_PHONY(241)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4053 SPRITE_RENDER_H40_PHONY(242)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4054 SPRITE_RENDER_H40_PHONY(243) //provides "garbage" for border when plane A selected
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4055 case 244:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4056 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4057 context->hslot++;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4058 context->cycles += h40_hsync_cycles[14];
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4059 CHECK_ONLY //provides "garbage" for border when plane A selected
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4060 //!HSYNC high
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4061 SPRITE_RENDER_H40_PHONY(245)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4062 SPRITE_RENDER_H40_PHONY(246)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4063 SPRITE_RENDER_H40_PHONY(247) //provides "garbage" for border when plane B selected
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4064 SPRITE_RENDER_H40_PHONY(248) //provides "garbage" for border when plane B selected
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4065 case 249:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4066 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4067 SPRITE_RENDER_H40_PHONY(250)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4068 case 251:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4069 scan_sprite_table(context->vcounter, context);//Just a guess
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4070 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4071 case 252:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4072 scan_sprite_table(context->vcounter, context);//Just a guess
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4073 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4074 case 253:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4075 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4076 SPRITE_RENDER_H40_PHONY(254)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4077 case 255:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4078 scan_sprite_table(context->vcounter, context);//Just a guess
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4079 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4080 case 0:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4081 scan_sprite_table(context->vcounter, context);//Just a guess
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4082 //seems like the sprite table scan fills a shift register
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4083 //values are FIFO, but unused slots precede used slots
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4084 //so we set cur_slot to slot_counter and let it wrap around to
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4085 //the beginning of the list
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4086 context->cur_slot = context->slot_counter;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4087 context->sprite_x_offset = 0;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4088 context->sprite_draws = MAX_SPRITES_LINE;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4089 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4090 COLUMN_RENDER_BLOCK_PHONY(2, 1)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4091 COLUMN_RENDER_BLOCK_PHONY(4, 9)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4092 COLUMN_RENDER_BLOCK_PHONY(6, 17)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4093 COLUMN_RENDER_BLOCK_REFRESH_PHONY(8, 25)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4094 COLUMN_RENDER_BLOCK_PHONY(10, 33)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4095 COLUMN_RENDER_BLOCK_PHONY(12, 41)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4096 COLUMN_RENDER_BLOCK_PHONY(14, 49)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4097 COLUMN_RENDER_BLOCK_REFRESH_PHONY(16, 57)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4098 COLUMN_RENDER_BLOCK_PHONY(18, 65)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4099 COLUMN_RENDER_BLOCK_PHONY(20, 73)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4100 COLUMN_RENDER_BLOCK_PHONY(22, 81)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4101 COLUMN_RENDER_BLOCK_REFRESH_PHONY(24, 89)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4102 COLUMN_RENDER_BLOCK_PHONY(26, 97)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4103 COLUMN_RENDER_BLOCK_PHONY(28, 105)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4104 COLUMN_RENDER_BLOCK_PHONY(30, 113)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4105 COLUMN_RENDER_BLOCK_REFRESH_PHONY(32, 121)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4106 COLUMN_RENDER_BLOCK_PHONY(34, 129)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4107 COLUMN_RENDER_BLOCK_PHONY(36, 137)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4108 COLUMN_RENDER_BLOCK_PHONY(38, 145)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4109 COLUMN_RENDER_BLOCK_REFRESH_PHONY(40, 153)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4110 case 161:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4111 external_slot(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4112 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4113 case 162:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4114 external_slot(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4115 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4116 //sprite render to line buffer starts
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4117 case 163:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4118 context->cur_slot = MAX_SPRITES_LINE-1;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4119 memset(context->linebuf, 0, LINEBUF_SIZE);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4120 context->flags &= ~FLAG_MASKED;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4121 while (context->sprite_draws) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4122 context->sprite_draws--;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4123 context->sprite_draw_list[context->sprite_draws].x_pos = 0;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4124 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4125 render_sprite_cells(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4126 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4127 case 164:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4128 render_sprite_cells(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4129 if (context->flags & FLAG_DMA_RUN) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4130 run_dma_src(context, -1);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4131 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4132 context->hslot++;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4133 context->cycles += slot_cycles;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4134 vdp_advance_line(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4135 CHECK_ONLY
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4136 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4137 default:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4138 context->hslot++;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4139 context->cycles += slot_cycles;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4140 return;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4141 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4142 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4143
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	4144 static void vdp_h32(vdp_context * context, uint32_t target_cycles)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	4145 {
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	4146 uint16_t address;
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	4147 uint32_t mask;
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4148 uint32_t const slot_cycles = MCLKS_SLOT_H32;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4149 uint8_t bgindex = context->regs[REG_BG_COLOR] & 0x3F;
2675 dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	4150 uint8_t test_layer = context->test_regs[0] >> 7 & 3;
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	4151 if (!context->output) {
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	4152 //This shouldn't happen normally, but it can theoretically
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	4153 //happen when doing border busting
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	4154 context->output = dummy_buffer;
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	4155 }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4156 switch(context->hslot)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4157 {
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4158 for (;;)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	4159 {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4160 case 133:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4161 OUTPUT_PIXEL(133)
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4162 if (context->state == PREPARING) {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4163 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4164 } else {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4165 render_sprite_cells(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4166 }
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4167 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4168 case 134:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4169 OUTPUT_PIXEL(134)
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4170 if (context->state == PREPARING) {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4171 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4172 } else {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4173 render_sprite_cells(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4174 }
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4175 if (context->vcounter == context->inactive_start) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4176 context->hslot++;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4177 context->cycles += slot_cycles;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4178 return;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4179 }
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4180 CHECK_LIMIT
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	4181 //sprite attribute table scan starts
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	4182 case 135:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4183 OUTPUT_PIXEL(135)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4184 context->sprite_index = 0x80;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	4185 context->slot_counter = 0;
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	4186 render_sprite_cells(context);
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	4187 render_border_garbage(
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	4188 context,
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	4189 context->serial_address,
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	4190 context->tmp_buf_b, context->buf_b_off,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	4191 context->col_1
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	4192 );
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4193 scan_sprite_table(context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4194 CHECK_LIMIT
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	4195 SPRITE_RENDER_H32(136)
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	4196 SPRITE_RENDER_H32(137)
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	4197 SPRITE_RENDER_H32(138)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4198 SPRITE_RENDER_H32(139)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4199 SPRITE_RENDER_H32(140)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4200 SPRITE_RENDER_H32(141)
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4201 SPRITE_RENDER_H32(142)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4202 SPRITE_RENDER_H32(143)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4203 SPRITE_RENDER_H32(144)
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4204 case 145:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4205 OUTPUT_PIXEL(145)
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4206 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4207 CHECK_LIMIT
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4208 SPRITE_RENDER_H32(146)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4209 SPRITE_RENDER_H32(147)
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	4210 SPRITE_RENDER_H32(233)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4211 SPRITE_RENDER_H32(234)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4212 SPRITE_RENDER_H32(235)
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4213 //HSYNC start
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4214 SPRITE_RENDER_H32(236)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4215 SPRITE_RENDER_H32(237)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4216 SPRITE_RENDER_H32(238)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4217 SPRITE_RENDER_H32(239)
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4218 SPRITE_RENDER_H32(240)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4219 SPRITE_RENDER_H32(241)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4220 SPRITE_RENDER_H32(242)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4221 case 243:
1422 2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	4222 if (!(context->regs[REG_MODE_3] & BIT_VSCROLL)) {
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	4223 //TODO: Develop some tests on hardware to see when vscroll latch actually happens for full plane mode
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	4224 //Top Gear 2 has a very efficient HINT routine that can occassionally hit this slot with a VSRAM write
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	4225 //Since CRAM-updatnig HINT routines seem to indicate that my HINT latency is perhaps slightly too high
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	4226 //the most reasonable explanation is that vscroll is latched before this slot, but tests are needed
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	4227 //to confirm that one way or another
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	4228 context->vscroll_latch[0] = context->vsram[0];
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	4229 context->vscroll_latch[1] = context->vsram[1];
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	4230 }
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	4231 external_slot(context);
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	4232 //provides "garbage" for border when plane A selected
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	4233 render_border_garbage(
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	4234 context,
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	4235 context->serial_address,
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	4236 context->tmp_buf_a,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	4237 context->buf_a_off,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	4238 context->col_1
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	4239 );
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4240 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4241 case 244:
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	4242 address = (context->regs[REG_HSCROLL] & 0x3F) << 10;
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	4243 mask = 0;
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	4244 if (context->regs[REG_MODE_3] & 0x2) {
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	4245 mask \|= 0xF8;
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	4246 }
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	4247 if (context->regs[REG_MODE_3] & 0x1) {
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	4248 mask \|= 0x7;
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	4249 }
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	4250 render_border_garbage(context, address, context->tmp_buf_a, context->buf_a_off+8, context->col_2);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4251 address += (context->vcounter & mask) * 4;
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	4252 context->hscroll_a = context->vdpmem[address] << 8 \| context->vdpmem[address+1];
1885 4178ce857e87 Calculate fine scroll once per line for a small speedup Michael Pavone <pavone@retrodev.com> parents: 1884 diff changeset	4253 context->hscroll_a_fine = context->hscroll_a & 0xF;
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	4254 context->hscroll_b = context->vdpmem[address+2] << 8 \| context->vdpmem[address+3];
1888 bd60e74fd173 Fix regression in H32 from fine scroll optimization Michael Pavone <pavone@retrodev.com> parents: 1887 diff changeset	4255 context->hscroll_b_fine = context->hscroll_b & 0xF;
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4256 //printf("%d: HScroll A: %d, HScroll B: %d\n", context->vcounter, context->hscroll_a, context->hscroll_b);
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	4257 CHECK_LIMIT //provides "garbage" for border when plane A selected
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	4258 SPRITE_RENDER_H32(245)
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4259 SPRITE_RENDER_H32(246)
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	4260 SPRITE_RENDER_H32(247) //provides "garbage" for border when plane B selected
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	4261 SPRITE_RENDER_H32(248) //provides "garbage" for border when plane B selected
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	4262 //!HSYNC high
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4263 case 249:
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4264 read_map_scroll_a(0, context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4265 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4266 SPRITE_RENDER_H32(250)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4267 case 251:
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	4268 render_map_1(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4269 scan_sprite_table(context->vcounter, context);//Just a guess
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4270 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4271 case 252:
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	4272 render_map_2(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4273 scan_sprite_table(context->vcounter, context);//Just a guess
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	4274 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4275 case 253:
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4276 read_map_scroll_b(0, context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4277 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4278 case 254:
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	4279 render_sprite_cells(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4280 scan_sprite_table(context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4281 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4282 case 255:
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	4283 render_map_3(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4284 scan_sprite_table(context->vcounter, context);//Just a guess
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4285 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4286 case 0:
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4287 render_map_output(context->vcounter, 0, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4288 scan_sprite_table(context->vcounter, context);//Just a guess
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	4289 //reverse context slot counter so it counts the number of sprite slots
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	4290 //filled rather than the number of available slots
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	4291 //context->slot_counter = MAX_SPRITES_LINE - context->slot_counter;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	4292 context->cur_slot = context->slot_counter;
1873 041a381b9f0d Fix regression in sprite rendering in H32 mode Michael Pavone <pavone@retrodev.com> parents: 1871 diff changeset	4293 context->sprite_x_offset = 0;
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4294 context->sprite_draws = MAX_SPRITES_LINE_H32;
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4295 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4296 COLUMN_RENDER_BLOCK(2, 1)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4297 COLUMN_RENDER_BLOCK(4, 9)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4298 COLUMN_RENDER_BLOCK(6, 17)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4299 COLUMN_RENDER_BLOCK_REFRESH(8, 25)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4300 COLUMN_RENDER_BLOCK(10, 33)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4301 COLUMN_RENDER_BLOCK(12, 41)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4302 COLUMN_RENDER_BLOCK(14, 49)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4303 COLUMN_RENDER_BLOCK_REFRESH(16, 57)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4304 COLUMN_RENDER_BLOCK(18, 65)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4305 COLUMN_RENDER_BLOCK(20, 73)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4306 COLUMN_RENDER_BLOCK(22, 81)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4307 COLUMN_RENDER_BLOCK_REFRESH(24, 89)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4308 COLUMN_RENDER_BLOCK(26, 97)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4309 COLUMN_RENDER_BLOCK(28, 105)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4310 COLUMN_RENDER_BLOCK(30, 113)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4311 COLUMN_RENDER_BLOCK_REFRESH(32, 121)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4312 case 129:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4313 OUTPUT_PIXEL(129)
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	4314 external_slot(context);
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	4315 CHECK_LIMIT
1269 ff8e29eeb1ec Render horizontal border in H32 mode as well. Both modes still need some minor work to deal with inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1267 diff changeset	4316 case 130: {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4317 OUTPUT_PIXEL(130)
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	4318 external_slot(context);
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	4319 CHECK_LIMIT
1269 ff8e29eeb1ec Render horizontal border in H32 mode as well. Both modes still need some minor work to deal with inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1267 diff changeset	4320 }
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	4321 //sprite render to line buffer starts
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4322 case 131:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4323 OUTPUT_PIXEL(131)
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4324 context->cur_slot = MAX_SPRITES_LINE_H32-1;
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	4325 memset(context->linebuf, 0, LINEBUF_SIZE);
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4326 context->flags &= ~FLAG_MASKED;
2564 553a0b4888db More robust sprite overflow regression fix Michael Pavone <pavone@retrodev.com> parents: 2563 diff changeset	4327 while (context->sprite_draws) {
553a0b4888db More robust sprite overflow regression fix Michael Pavone <pavone@retrodev.com> parents: 2563 diff changeset	4328 context->sprite_draws--;
553a0b4888db More robust sprite overflow regression fix Michael Pavone <pavone@retrodev.com> parents: 2563 diff changeset	4329 context->sprite_draw_list[context->sprite_draws].x_pos = 0;
2563 f51d750b4d06 Fix sprite overflow regression in Super Hang-On and other games Michael Pavone <pavone@retrodev.com> parents: 2559 diff changeset	4330 }
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	4331 render_sprite_cells(context);
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	4332 render_border_garbage(
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	4333 context,
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	4334 context->serial_address,
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	4335 context->tmp_buf_a, context->buf_a_off,
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	4336 context->col_1
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	4337 );
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	4338 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4339 case 132:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4340 OUTPUT_PIXEL(132)
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	4341 render_sprite_cells(context);
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	4342 render_border_garbage(
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	4343 context,
2566 e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve Michael Pavone <pavone@retrodev.com> parents: 2564 diff changeset	4344 context->serial_address,
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	4345 context->tmp_buf_a, context->buf_a_off + 8,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	4346 context->col_2
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	4347 );
1173 d0f67c59b756 Fix H32 inconsistency Michael Pavone <pavone@retrodev.com> parents: 1172 diff changeset	4348 if (context->flags & FLAG_DMA_RUN) {
d0f67c59b756 Fix H32 inconsistency Michael Pavone <pavone@retrodev.com> parents: 1172 diff changeset	4349 run_dma_src(context, -1);
d0f67c59b756 Fix H32 inconsistency Michael Pavone <pavone@retrodev.com> parents: 1172 diff changeset	4350 }
d0f67c59b756 Fix H32 inconsistency Michael Pavone <pavone@retrodev.com> parents: 1172 diff changeset	4351 context->hslot++;
d0f67c59b756 Fix H32 inconsistency Michael Pavone <pavone@retrodev.com> parents: 1172 diff changeset	4352 context->cycles += slot_cycles;
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	4353 vdp_advance_line(context);
1173 d0f67c59b756 Fix H32 inconsistency Michael Pavone <pavone@retrodev.com> parents: 1172 diff changeset	4354 CHECK_ONLY
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	4355 }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4356 default:
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4357 context->hslot++;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	4358 context->cycles += MCLKS_SLOT_H32;
503 eee6be465c47 Small optimization for H40 mode Mike Pavone <pavone@retrodev.com> parents: 499 diff changeset	4359 }
eee6be465c47 Small optimization for H40 mode Mike Pavone <pavone@retrodev.com> parents: 499 diff changeset	4360 }
eee6be465c47 Small optimization for H40 mode Mike Pavone <pavone@retrodev.com> parents: 499 diff changeset	4361
2686 05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4362 static void vdp_h32_phony(vdp_context * context, uint32_t target_cycles)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4363 {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4364 uint32_t const slot_cycles = MCLKS_SLOT_H32;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4365 switch(context->hslot)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4366 {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4367 for (;;)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4368 {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4369 case 133:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4370 if (context->state == PREPARING) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4371 external_slot(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4372 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4373 render_sprite_cells(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4374 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4375 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4376 case 134:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4377 if (context->state == PREPARING) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4378 external_slot(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4379 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4380 render_sprite_cells(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4381 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4382 if (context->vcounter == context->inactive_start) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4383 context->hslot++;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4384 context->cycles += slot_cycles;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4385 return;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4386 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4387 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4388 //sprite attribute table scan starts
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4389 case 135:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4390 context->sprite_index = 0x80;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4391 context->slot_counter = 0;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4392 render_sprite_cells(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4393 scan_sprite_table(context->vcounter, context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4394 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4395 SPRITE_RENDER_H32_PHONY(136)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4396 SPRITE_RENDER_H32_PHONY(137)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4397 SPRITE_RENDER_H32_PHONY(138)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4398 SPRITE_RENDER_H32_PHONY(139)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4399 SPRITE_RENDER_H32_PHONY(140)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4400 SPRITE_RENDER_H32_PHONY(141)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4401 SPRITE_RENDER_H32_PHONY(142)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4402 SPRITE_RENDER_H32_PHONY(143)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4403 SPRITE_RENDER_H32_PHONY(144)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4404 case 145:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4405 external_slot(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4406 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4407 SPRITE_RENDER_H32_PHONY(146)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4408 SPRITE_RENDER_H32_PHONY(147)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4409 SPRITE_RENDER_H32_PHONY(233)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4410 SPRITE_RENDER_H32_PHONY(234)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4411 SPRITE_RENDER_H32_PHONY(235)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4412 //HSYNC start
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4413 SPRITE_RENDER_H32_PHONY(236)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4414 SPRITE_RENDER_H32_PHONY(237)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4415 SPRITE_RENDER_H32_PHONY(238)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4416 SPRITE_RENDER_H32_PHONY(239)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4417 SPRITE_RENDER_H32_PHONY(240)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4418 SPRITE_RENDER_H32_PHONY(241)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4419 SPRITE_RENDER_H32_PHONY(242)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4420 case 243:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4421 external_slot(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4422 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4423 case 244:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4424 CHECK_LIMIT //provides "garbage" for border when plane A selected
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4425 SPRITE_RENDER_H32_PHONY(245)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4426 SPRITE_RENDER_H32_PHONY(246)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4427 SPRITE_RENDER_H32_PHONY(247) //provides "garbage" for border when plane B selected
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4428 SPRITE_RENDER_H32_PHONY(248) //provides "garbage" for border when plane B selected
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4429 //!HSYNC high
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4430 case 249:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4431 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4432 SPRITE_RENDER_H32_PHONY(250)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4433 case 251:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4434 scan_sprite_table(context->vcounter, context);//Just a guess
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4435 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4436 case 252:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4437 scan_sprite_table(context->vcounter, context);//Just a guess
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4438 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4439 case 253:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4440 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4441 case 254:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4442 render_sprite_cells(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4443 scan_sprite_table(context->vcounter, context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4444 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4445 case 255:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4446 scan_sprite_table(context->vcounter, context);//Just a guess
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4447 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4448 case 0:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4449 scan_sprite_table(context->vcounter, context);//Just a guess
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4450 //reverse context slot counter so it counts the number of sprite slots
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4451 //filled rather than the number of available slots
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4452 //context->slot_counter = MAX_SPRITES_LINE - context->slot_counter;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4453 context->cur_slot = context->slot_counter;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4454 context->sprite_x_offset = 0;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4455 context->sprite_draws = MAX_SPRITES_LINE_H32;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4456 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4457 COLUMN_RENDER_BLOCK_PHONY(2, 1)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4458 COLUMN_RENDER_BLOCK_PHONY(4, 9)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4459 COLUMN_RENDER_BLOCK_PHONY(6, 17)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4460 COLUMN_RENDER_BLOCK_REFRESH_PHONY(8, 25)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4461 COLUMN_RENDER_BLOCK_PHONY(10, 33)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4462 COLUMN_RENDER_BLOCK_PHONY(12, 41)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4463 COLUMN_RENDER_BLOCK_PHONY(14, 49)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4464 COLUMN_RENDER_BLOCK_REFRESH_PHONY(16, 57)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4465 COLUMN_RENDER_BLOCK_PHONY(18, 65)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4466 COLUMN_RENDER_BLOCK_PHONY(20, 73)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4467 COLUMN_RENDER_BLOCK_PHONY(22, 81)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4468 COLUMN_RENDER_BLOCK_REFRESH_PHONY(24, 89)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4469 COLUMN_RENDER_BLOCK_PHONY(26, 97)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4470 COLUMN_RENDER_BLOCK_PHONY(28, 105)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4471 COLUMN_RENDER_BLOCK_PHONY(30, 113)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4472 COLUMN_RENDER_BLOCK_REFRESH_PHONY(32, 121)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4473 case 129:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4474 external_slot(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4475 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4476 case 130: {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4477 external_slot(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4478 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4479 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4480 //sprite render to line buffer starts
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4481 case 131:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4482 context->cur_slot = MAX_SPRITES_LINE_H32-1;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4483 context->flags &= ~FLAG_MASKED;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4484 while (context->sprite_draws) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4485 context->sprite_draws--;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4486 context->sprite_draw_list[context->sprite_draws].x_pos = 0;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4487 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4488 render_sprite_cells(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4489 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4490 case 132:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4491 render_sprite_cells(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4492 if (context->flags & FLAG_DMA_RUN) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4493 run_dma_src(context, -1);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4494 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4495 context->hslot++;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4496 context->cycles += slot_cycles;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4497 vdp_advance_line(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4498 CHECK_ONLY
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4499 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4500 default:
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4501 context->hslot++;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4502 context->cycles += MCLKS_SLOT_H32;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4503 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4504 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	4505
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4506 static void vdp_h32_mode4(vdp_context * context, uint32_t target_cycles)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4507 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4508 uint16_t address;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4509 uint32_t mask;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4510 uint32_t const slot_cycles = MCLKS_SLOT_H32;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4511 uint8_t bgindex = 0x10 \| (context->regs[REG_BG_COLOR] & 0xF) + MODE4_OFFSET;
2675 dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	4512 uint8_t test_layer = context->test_regs[0] >> 7 & 3;
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	4513 if (!context->output) {
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	4514 //This shouldn't happen normally, but it can theoretically
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	4515 //happen when doing border busting
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	4516 context->output = dummy_buffer;
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	4517 }
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4518 switch(context->hslot)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4519 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4520 for (;;)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4521 {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	4522 //sprite rendering starts
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4523 SPRITE_RENDER_H32_MODE4(137)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4524 SPRITE_RENDER_H32_MODE4(143)
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	4525 case 234:
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4526 external_slot(context);
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4527 CHECK_LIMIT
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	4528 case 235:
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	4529 external_slot(context);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	4530 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4531 //!HSYNC low
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4532 case 236:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4533 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4534 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4535 case 237:
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	4536 external_slot(context);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	4537 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4538 case 238:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4539 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4540 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4541 SPRITE_RENDER_H32_MODE4(239)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4542 SPRITE_RENDER_H32_MODE4(245)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4543 case 251:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4544 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4545 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4546 case 252:
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	4547 external_slot(context);
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4548 if (context->regs[REG_MODE_1] & BIT_HSCRL_LOCK && context->vcounter < 16) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4549 context->hscroll_a = 0;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4550 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4551 context->hscroll_a = context->regs[REG_X_SCROLL];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4552 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4553 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4554 case 253:
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	4555 context->sprite_index = 0;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	4556 context->slot_counter = MAX_DRAWS_H32_MODE4;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	4557 scan_sprite_table_mode4(context);
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4558 CHECK_LIMIT
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	4559 case 254:
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	4560 scan_sprite_table_mode4(context);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	4561 CHECK_LIMIT
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	4562 case 255:
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	4563 scan_sprite_table_mode4(context);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	4564 CHECK_LIMIT
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	4565 case 0: {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	4566 scan_sprite_table_mode4(context);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	4567 CHECK_LIMIT
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	4568 }
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	4569 case 1:
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	4570 scan_sprite_table_mode4(context);
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4571 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4572 case 2:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4573 scan_sprite_table_mode4(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4574 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4575 case 3:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4576 scan_sprite_table_mode4(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4577 CHECK_LIMIT
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	4578 case 4: {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4579 scan_sprite_table_mode4(context);
1121 1913f9c28003 Less broken Mode 4 implementation Michael Pavone <pavone@retrodev.com> parents: 1120 diff changeset	4580 context->buf_a_off = 8;
1913f9c28003 Less broken Mode 4 implementation Michael Pavone <pavone@retrodev.com> parents: 1120 diff changeset	4581 memset(context->tmp_buf_a, 0, 8);
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4582 CHECK_LIMIT
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	4583 }
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4584 COLUMN_RENDER_BLOCK_MODE4(0, 5)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4585 COLUMN_RENDER_BLOCK_MODE4(1, 9)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4586 COLUMN_RENDER_BLOCK_MODE4(2, 13)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4587 COLUMN_RENDER_BLOCK_MODE4(3, 17)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4588 COLUMN_RENDER_BLOCK_MODE4(4, 21)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4589 COLUMN_RENDER_BLOCK_MODE4(5, 25)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4590 COLUMN_RENDER_BLOCK_MODE4(6, 29)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4591 COLUMN_RENDER_BLOCK_MODE4(7, 33)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4592 COLUMN_RENDER_BLOCK_MODE4(8, 37)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4593 COLUMN_RENDER_BLOCK_MODE4(9, 41)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4594 COLUMN_RENDER_BLOCK_MODE4(10, 45)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4595 COLUMN_RENDER_BLOCK_MODE4(11, 49)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4596 COLUMN_RENDER_BLOCK_MODE4(12, 53)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4597 COLUMN_RENDER_BLOCK_MODE4(13, 57)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4598 COLUMN_RENDER_BLOCK_MODE4(14, 61)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4599 COLUMN_RENDER_BLOCK_MODE4(15, 65)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4600 COLUMN_RENDER_BLOCK_MODE4(16, 69)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4601 COLUMN_RENDER_BLOCK_MODE4(17, 73)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4602 COLUMN_RENDER_BLOCK_MODE4(18, 77)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4603 COLUMN_RENDER_BLOCK_MODE4(19, 81)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4604 COLUMN_RENDER_BLOCK_MODE4(20, 85)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4605 COLUMN_RENDER_BLOCK_MODE4(21, 89)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4606 COLUMN_RENDER_BLOCK_MODE4(22, 93)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4607 COLUMN_RENDER_BLOCK_MODE4(23, 97)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4608 COLUMN_RENDER_BLOCK_MODE4(24, 101)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4609 COLUMN_RENDER_BLOCK_MODE4(25, 105)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4610 COLUMN_RENDER_BLOCK_MODE4(26, 109)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4611 COLUMN_RENDER_BLOCK_MODE4(27, 113)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4612 COLUMN_RENDER_BLOCK_MODE4(28, 117)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4613 COLUMN_RENDER_BLOCK_MODE4(29, 121)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4614 COLUMN_RENDER_BLOCK_MODE4(30, 125)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4615 COLUMN_RENDER_BLOCK_MODE4(31, 129)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4616 case 133:
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	4617 OUTPUT_PIXEL_MODE4(133)
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4618 external_slot(context);
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4619 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4620 case 134:
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	4621 OUTPUT_PIXEL_MODE4(134)
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4622 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4623 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4624 case 135:
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	4625 OUTPUT_PIXEL_MODE4(135)
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4626 external_slot(context);
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4627 CHECK_LIMIT
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	4628 case 136: {
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	4629 OUTPUT_PIXEL_MODE4(136)
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4630 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4631 //set things up for sprite rendering in the next slot
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4632 memset(context->linebuf, 0, LINEBUF_SIZE);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4633 context->cur_slot = context->sprite_index = MAX_DRAWS_H32_MODE4-1;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4634 context->sprite_draws = MAX_DRAWS_H32_MODE4;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4635 CHECK_LIMIT
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	4636 }}
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4637 default:
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4638 context->hslot++;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4639 context->cycles += MCLKS_SLOT_H32;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4640 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4641 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4642
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4643
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4644 static void tms_fetch_pattern_name(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4645 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4646 uint16_t address = context->regs[REG_SCROLL_A] << 10 & 0x3C00;
2260 3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4647 if (context->regs[REG_MODE_2] & BIT_M1) {
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4648 //Text mode
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4649 address \|= (context->vcounter >> 3) * 40;
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4650 address += (context->hslot - 4) / 3;
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4651 } else {
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4652 //Graphics/Multicolor
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4653 address \|= context->vcounter << 2 & 0x03E0;
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4654 address \|= context->hslot >> 2;
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4655 }
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4656 //TODO: 4K/16K mode address remapping when emulating TMS9918A
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4657 address = mode4_address_map[address] ^ 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4658 context->col_1 = context->vdpmem[address];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4659 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4660
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4661 static void tms_fetch_color(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4662 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4663 if (context->regs[REG_MODE_2] & BIT_M2) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4664 //Multicolor
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4665 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4666 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4667 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4668 uint16_t address = context->regs[REG_COLOR_TABLE] << 6;
2411 efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	4669 if (context->regs[REG_MODE_1] & BIT_M3) {
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4670 //Graphics II
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4671 uint16_t upper_vcounter_mask;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4672 uint16_t pattern_name_mask;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4673 if (context->type > VDP_SMS2) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4674 //SMS1 and TMS9918A
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4675 upper_vcounter_mask = address & 0x1800;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4676 pattern_name_mask = (address & 0x07C0) \| 0x0038;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4677 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4678 //SMS2 and Game Gear
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4679 upper_vcounter_mask = 0x1800;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4680 pattern_name_mask = 0x07F8;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4681 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4682 address &= 0x2000;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4683 address \|= context->vcounter << 5 & upper_vcounter_mask;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4684 address \|= context->col_1 << 3 & pattern_name_mask;
2258 a28e1042f4de Fix a few of the most glaring TMS9918A issues Michael Pavone <pavone@retrodev.com> parents: 2257 diff changeset	4685 address \|= context->vcounter & 7;
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4686 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4687 address \|= context->col_1 >> 3;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4688 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4689 //TODO: 4K/16K mode address remapping when emulating TMS9918A
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4690 address = mode4_address_map[address] ^ 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4691 context->col_2 = context->vdpmem[address];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4692 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4693
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4694 static void tms_fetch_pattern_value(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4695 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4696 uint16_t address = context->regs[REG_PATTERN_GEN] << 11 & 0x3800;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4697 if (context->regs[REG_MODE_1] & BIT_M3) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4698 //Graphics II
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4699 uint16_t mask = context->type > VDP_SMS2 ? address & 0x1800 : 0x1800;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4700 address &= 0x2000;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4701 address \|= context->vcounter << 5 & mask;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4702 }
2414 dc05f1805921 Fix out of bound read from mode4_address_map in TMS modes Michael Pavone <pavone@retrodev.com> parents: 2411 diff changeset	4703 address \|= context->col_1 << 3 & 0x7F8;
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4704 if (context->regs[REG_MODE_2] & BIT_M2) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4705 //Multicolor
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4706 address \|= context->vcounter >> 2 & 0x3;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4707 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4708 address \|= context->vcounter & 0x7;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4709 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4710
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4711 //TODO: 4K/16K mode address remapping when emulating TMS9918A
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4712 address = mode4_address_map[address] ^ 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4713 uint8_t value = context->vdpmem[address];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4714 if (context->regs[REG_MODE_2] & BIT_M2) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4715 //Multicolor
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4716 context->tmp_buf_a[0] = 0xF0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4717 context->tmp_buf_b[0] = value;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4718 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4719 context->tmp_buf_a[0] = value;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4720 context->tmp_buf_b[0] = context->col_2;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4721 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4722 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4723
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4724 static void tms_sprite_scan(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4725 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4726 if (context->sprite_draws > 4 \|\| context->sprite_index == 32) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4727 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4728 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4729 uint16_t address = context->regs[REG_SAT] << 7 & 0x3F80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4730 address \|= context->sprite_index << 2;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4731 address = mode4_address_map[address] ^ 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4732 uint8_t y = context->vdpmem[address];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4733 if (y == 208) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4734 context->sprite_index = 32;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4735 context->sprite_info_list[4].index = context->sprite_index;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4736 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4737 uint8_t diff = context->vcounter + 1 - y;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4738 uint8_t size = 8;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4739 if (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4740 size *= 2;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4741 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4742 if (context->regs[REG_MODE_2] & BIT_SPRITE_ZM) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4743 size *= 2;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4744 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4745 if (diff < size) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4746 context->sprite_info_list[context->sprite_draws++].index = context->sprite_index;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4747 if (context->sprite_draws == 5) {
2574 0da40b1978fd Sprite overflow flag should only be set when there are too many sprites in a line and not when there are just too many sprite pixels. Fixes regression in Madou Monogatari I Michael Pavone <pavone@retrodev.com> parents: 2572 diff changeset	4748 context->flags \|= FLAG_SPRITE_OFLOW;
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4749 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4750 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4751 context->sprite_info_list[4].index = context->sprite_index;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4752 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4753 context->sprite_index++;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4754 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4755
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4756 static void tms_sprite_vert(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4757 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4758 if (context->sprite_index >= 4 \|\| context->sprite_index >= context->sprite_draws) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4759 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4760 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4761 uint16_t address = context->regs[REG_SAT] << 7 & 0x3F80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4762 address \|= context->sprite_info_list[context->sprite_index].index << 2;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4763 address = mode4_address_map[address] ^ 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4764 context->sprite_info_list[context->sprite_index].y = context->vdpmem[address];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4765 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4766
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4767 static void tms_sprite_horiz(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4768 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4769 if (context->sprite_index >= 4 \|\| context->sprite_index >= context->sprite_draws) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4770 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4771 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4772 uint16_t address = context->regs[REG_SAT] << 7 & 0x3F80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4773 address \|= context->sprite_info_list[context->sprite_index].index << 2 \| 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4774 address = mode4_address_map[address] ^ 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4775 context->sprite_draw_list[context->sprite_index].x_pos = context->vdpmem[address];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4776 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4777
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4778 static void tms_sprite_name(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4779 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4780 if (context->sprite_index >= 4 \|\| context->sprite_index >= context->sprite_draws) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4781 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4782 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4783 uint16_t address = context->regs[REG_SAT] << 7 & 0x3F80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4784 address \|= context->sprite_info_list[context->sprite_index].index << 2 \| 2;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4785 address = context->vdpmem[mode4_address_map[address] ^ 1] << 3;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4786 address \|= context->regs[REG_STILE_BASE] << 11 & 0x3800;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4787 uint8_t diff = context->vcounter + 1 - context->sprite_info_list[context->sprite_index].y;
2513 61645edbe30f Fix TMS9918A sprite zooming and early clock flag Michael Pavone <pavone@retrodev.com> parents: 2511 diff changeset	4788 if (context->regs[REG_MODE_2] & BIT_SPRITE_ZM) {
61645edbe30f Fix TMS9918A sprite zooming and early clock flag Michael Pavone <pavone@retrodev.com> parents: 2511 diff changeset	4789 diff >>= 1;
61645edbe30f Fix TMS9918A sprite zooming and early clock flag Michael Pavone <pavone@retrodev.com> parents: 2511 diff changeset	4790 }
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4791 address += diff;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4792 context->sprite_draw_list[context->sprite_index].address = address;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4793 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4794
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4795 static void tms_sprite_tag(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4796 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4797 if (context->sprite_index >= 4 \|\| context->sprite_index >= context->sprite_draws) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4798 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4799 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4800 uint16_t address = context->regs[REG_SAT] << 7 & 0x3F80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4801 address \|= context->sprite_info_list[context->sprite_index].index << 2 \| 3;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4802 address = mode4_address_map[address] ^ 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4803 uint8_t tag = context->vdpmem[address];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4804 if (tag & 0x80) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4805 //early clock flag
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4806 context->sprite_draw_list[context->sprite_index].x_pos -= 32;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4807 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4808 context->sprite_draw_list[context->sprite_index].pal_priority = tag & 0xF;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4809 context->col_1 = 0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4810 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4811
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4812 static void tms_sprite_pattern1(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4813 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4814 if (context->sprite_index >= 4 \|\| context->sprite_index >= context->sprite_draws) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4815 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4816 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4817 context->col_1 = context->vdpmem[mode4_address_map[context->sprite_draw_list[context->sprite_index].address] ^ 1] << 8;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4818 context->sprite_draw_list[context->sprite_index].address += 16;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4819 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4820
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4821 static void tms_sprite_pattern2(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4822 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4823 if (context->sprite_index >= 4 \|\| context->sprite_index >= context->sprite_draws) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4824 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4825 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4826 uint16_t pixels = context->col_1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4827 if (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4828 pixels \|= context->vdpmem[mode4_address_map[context->sprite_draw_list[context->sprite_index].address] ^ 1];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4829 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4830 context->sprite_draw_list[context->sprite_index++].address = pixels;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4831 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4832
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4833 static uint8_t tms_sprite_clock(vdp_context *context, int16_t offset)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4834 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4835 int16_t x = context->hslot << 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4836 if (x > 294) {
2259 425b44fd7bf1 Fix TMS9918A sprite horizontal position Michael Pavone <pavone@retrodev.com> parents: 2258 diff changeset	4837 x -= 512 + 8;
425b44fd7bf1 Fix TMS9918A sprite horizontal position Michael Pavone <pavone@retrodev.com> parents: 2258 diff changeset	4838 } else {
425b44fd7bf1 Fix TMS9918A sprite horizontal position Michael Pavone <pavone@retrodev.com> parents: 2258 diff changeset	4839 x -= 8;
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4840 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4841 x += offset;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4842 uint8_t output = 0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4843 for (int i = 0; i < 4; i++) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4844 if (x >= context->sprite_draw_list[i].x_pos) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4845 if (context->sprite_draw_list[i].address & 0x8000) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4846 if (output) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4847 context->flags2 \|= FLAG2_SPRITE_COLLIDE;
2258 a28e1042f4de Fix a few of the most glaring TMS9918A issues Michael Pavone <pavone@retrodev.com> parents: 2257 diff changeset	4848 } else {
a28e1042f4de Fix a few of the most glaring TMS9918A issues Michael Pavone <pavone@retrodev.com> parents: 2257 diff changeset	4849 output = context->sprite_draw_list[i].pal_priority;
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4850 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4851 }
2572 941bc319dcd8 Fix sprite zoom in TMS modes for real this time Michael Pavone <pavone@retrodev.com> parents: 2571 diff changeset	4852 if (!(context->regs[REG_MODE_2] & BIT_SPRITE_ZM) \|\| ((x - context->sprite_draw_list[i].x_pos) & 1)) {
2513 61645edbe30f Fix TMS9918A sprite zooming and early clock flag Michael Pavone <pavone@retrodev.com> parents: 2511 diff changeset	4853 context->sprite_draw_list[i].address <<= 1;
61645edbe30f Fix TMS9918A sprite zooming and early clock flag Michael Pavone <pavone@retrodev.com> parents: 2511 diff changeset	4854 }
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4855 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4856 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4857 return output;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4858 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4859
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4860 static void tms_border(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4861 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4862 if (context->hslot < (256 + BORDER_LEFT - (BORDER_LEFT-8))/2 \|\| context->hslot > 256-32) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4863 tms_sprite_clock(context, 0);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4864 tms_sprite_clock(context, 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4865 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4866 if (!context->output) {
2260 3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4867 if ((context->hslot * 2 - 6 + BORDER_LEFT) == (256 + BORDER_LEFT + BORDER_RIGHT)) {
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4868 advance_output_line(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4869 }
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4870 if (!context->output) {
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4871 return;
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4872 }
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4873 }
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	4874 pixel_t color;
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4875 if (context->type == VDP_GAMEGEAR) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4876 //Game Gear uses CRAM entries 16-31 for TMS9918A modes
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4877 color = context->colors[(context->regs[REG_BG_COLOR] & 0xF) + 16 + MODE4_OFFSET];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4878 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4879 color = context->regs[REG_BG_COLOR] << 1 & 0x1E;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4880 color = (color & 0xE) \| (color << 1 & 0x20);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4881 color = context->color_map[color \| FBUF_TMS];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4882 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4883 if (context->hslot == (520 - BORDER_LEFT) / 2) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4884 context->output[0] = color;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4885 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4886 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4887 if (context->hslot < (256 + BORDER_LEFT + BORDER_RIGHT - (BORDER_LEFT - 8)) / 2) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4888 context->output[context->hslot * 2 - 8 + BORDER_LEFT] = color;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4889 context->output[context->hslot * 2 - 7 + BORDER_LEFT] = color;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4890 if ((context->hslot * 2 - 6 + BORDER_LEFT) == (256 + BORDER_LEFT + BORDER_RIGHT)) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4891 advance_output_line(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4892 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4893 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4894 int slot = (context->hslot - (520 - BORDER_LEFT) / 2) * 2 - 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4895 context->output[slot] = color;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4896 context->output[slot + 1] = color;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4897 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4898 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4899
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4900 static void tms_composite(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4901 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4902 if (context->state == PREPARING) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4903 tms_border(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4904 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4905 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4906 uint8_t color = tms_sprite_clock(context, 0);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4907 if (!context->output) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4908 tms_sprite_clock(context, 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4909 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4910 }
2612 7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	4911 uint8_t fg,bg;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	4912 if (context->regs[REG_MODE_2] & BIT_M1) {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	4913 //Text mode uses TC and BD colors
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	4914 fg = context->regs[REG_BG_COLOR] >> 4;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	4915 bg = context->regs[REG_BG_COLOR] & 0xF;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	4916 } else {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	4917 fg = context->tmp_buf_b[0] >> 4;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	4918 bg = context->tmp_buf_b[0] & 0xF;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	4919 if (!bg) {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	4920 bg = context->regs[REG_BG_COLOR] & 0xF;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	4921 }
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	4922 }
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4923 uint8_t pattern = context->tmp_buf_a[0] & 0x80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4924 context->tmp_buf_a[0] <<= 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4925 if (!color) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4926 color = pattern ? fg : bg;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4927 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4928 //TODO: composite debug output
2612 7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	4929 context->output[context->hslot * 2 - 8 + BORDER_LEFT] = tms_map_color(context, color);
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4930 color = tms_sprite_clock(context, 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4931 pattern = context->tmp_buf_a[0] & 0x80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4932 context->tmp_buf_a[0] <<= 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4933 if (!color) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4934 color = pattern ? fg : bg;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4935 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4936 //TODO: composite debug output
2612 7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD Michael Pavone <pavone@retrodev.com> parents: 2579 diff changeset	4937 context->output[context->hslot * 2 - 7 + BORDER_LEFT] = tms_map_color(context, color);
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4938 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4939
2260 3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4940 #define TMS_OUTPUT(slot) if ((slot) < 4 \|\| (slot) > (256 + BORDER_LEFT - 8) / 2) { tms_border(context); } else { tms_composite(context); }
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4941 #define TMS_OUTPUT_RIGHT(slot) \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4942 if ((slot) < (256 + BORDER_LEFT - (BORDER_LEFT - 8))/2) {\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4943 tms_composite(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4944 } else if ((slot < (256 + BORDER_LEFT + BORDER_RIGHT -(BORDER_LEFT - 8))/2)) {\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4945 tms_border(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4946 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4947 #define TMS_CHECK_LIMIT context->hslot++; context->cycles += MCLKS_SLOT_H32; if (context->cycles >= target_cycles) { return; }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4948 #define TMS_GRAPHICS_PATTERN_CPU_BLOCK(slot) \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4949 case slot:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4950 TMS_OUTPUT(slot)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4951 tms_fetch_pattern_name(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4952 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4953 case slot+1:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4954 TMS_OUTPUT(slot+1)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4955 external_slot(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4956 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4957 case slot+2:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4958 TMS_OUTPUT(slot+2)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4959 tms_fetch_color(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4960 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4961 case slot+3:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4962 TMS_OUTPUT(slot+3)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4963 tms_fetch_pattern_value(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4964 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4965
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4966 #define TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(slot) \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4967 case slot:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4968 TMS_OUTPUT(slot)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4969 tms_fetch_pattern_name(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4970 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4971 case slot+1:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4972 TMS_OUTPUT(slot+1)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4973 tms_sprite_scan(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4974 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4975 case slot+2:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4976 TMS_OUTPUT(slot+2)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4977 tms_fetch_color(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4978 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4979 case slot+3:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4980 TMS_OUTPUT(slot+3)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4981 tms_fetch_pattern_value(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4982 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4983
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4984 #define TMS_SPRITE_SCAN_SLOT(slot) \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4985 case slot:\
2513 61645edbe30f Fix TMS9918A sprite zooming and early clock flag Michael Pavone <pavone@retrodev.com> parents: 2511 diff changeset	4986 if (context->hslot >= (520 - BORDER_LEFT) / 2) {\
61645edbe30f Fix TMS9918A sprite zooming and early clock flag Michael Pavone <pavone@retrodev.com> parents: 2511 diff changeset	4987 tms_border(context);\
61645edbe30f Fix TMS9918A sprite zooming and early clock flag Michael Pavone <pavone@retrodev.com> parents: 2511 diff changeset	4988 } else {\
61645edbe30f Fix TMS9918A sprite zooming and early clock flag Michael Pavone <pavone@retrodev.com> parents: 2511 diff changeset	4989 tms_sprite_clock(context, 0);\
61645edbe30f Fix TMS9918A sprite zooming and early clock flag Michael Pavone <pavone@retrodev.com> parents: 2511 diff changeset	4990 tms_sprite_clock(context, 1);\
61645edbe30f Fix TMS9918A sprite zooming and early clock flag Michael Pavone <pavone@retrodev.com> parents: 2511 diff changeset	4991 }\
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4992 tms_sprite_scan(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4993 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4994
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4995 #define TMS_SPRITE_BLOCK(slot) \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4996 case slot:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4997 TMS_OUTPUT_RIGHT(slot)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4998 tms_sprite_vert(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4999 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5000 case slot+1:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5001 TMS_OUTPUT_RIGHT(slot+1)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5002 tms_sprite_horiz(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5003 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5004 case slot+2:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5005 TMS_OUTPUT_RIGHT(slot+2)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5006 tms_sprite_name(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5007 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5008 case slot+3:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5009 TMS_OUTPUT_RIGHT(slot+3)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5010 tms_sprite_tag(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5011 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5012 case slot+4:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5013 TMS_OUTPUT_RIGHT(slot+4)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5014 tms_sprite_pattern1(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5015 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5016 case slot+5:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5017 TMS_OUTPUT_RIGHT(slot+5)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5018 tms_sprite_pattern2(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5019 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5020
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5021 static void vdp_tms_graphics(vdp_context * context, uint32_t target_cycles)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5022 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5023 switch (context->hslot)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5024 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5025 for (;;)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5026 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5027 TMS_GRAPHICS_PATTERN_CPU_BLOCK(0)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5028 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(4)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5029 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(8)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5030 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(12)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5031 TMS_GRAPHICS_PATTERN_CPU_BLOCK(16)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5032 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(20)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5033 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(24)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5034 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(28)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5035 TMS_GRAPHICS_PATTERN_CPU_BLOCK(32)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5036 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(36)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5037 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(40)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5038 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(44)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5039 TMS_GRAPHICS_PATTERN_CPU_BLOCK(48)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5040 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(52)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5041 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(56)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5042 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(60)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5043 TMS_GRAPHICS_PATTERN_CPU_BLOCK(64)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5044 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(68)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5045 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(72)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5046 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(76)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5047 TMS_GRAPHICS_PATTERN_CPU_BLOCK(80)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5048 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(84)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5049 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(88)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5050 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(92)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5051 TMS_GRAPHICS_PATTERN_CPU_BLOCK(96)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5052 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(100)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5053 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(104)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5054 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(108)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5055 TMS_GRAPHICS_PATTERN_CPU_BLOCK(112)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5056 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(116)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5057 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(120)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5058 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(124)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5059 case 128:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5060 tms_composite(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5061 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5062 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5063 case 129:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5064 tms_composite(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5065 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5066 context->sprite_index = 0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5067 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5068
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5069 TMS_SPRITE_BLOCK(130)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5070 TMS_SPRITE_BLOCK(136)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5071 case 142:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5072 tms_sprite_vert(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5073 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5074 case 143:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5075 tms_sprite_horiz(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5076 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5077 case 145:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5078 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5079 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5080 case 146:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5081 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5082 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5083 case 147:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5084 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5085 context->hslot = 233;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5086 context->cycles += MCLKS_SLOT_H32;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5087 if (context->cycles >= target_cycles) { return; }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5088 case 233:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5089 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5090 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5091 case 234:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5092 tms_sprite_name(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5093 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5094 case 235:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5095 tms_sprite_tag(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5096 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5097 case 236:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5098 tms_sprite_pattern1(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5099 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5100 case 237:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5101 tms_sprite_pattern2(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5102 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5103 TMS_SPRITE_BLOCK(238)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5104 case 244:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5105 tms_sprite_clock(context, 0);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5106 tms_sprite_clock(context, 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5107 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5108 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5109 case 245:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5110 tms_sprite_clock(context, 0);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5111 tms_sprite_clock(context, 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5112 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5113 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5114 case 246:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5115 tms_sprite_clock(context, 0);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5116 tms_sprite_clock(context, 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5117 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5118 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5119 case 247:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5120 tms_sprite_clock(context, 0);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5121 tms_sprite_clock(context, 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5122 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5123 vdp_advance_line(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5124 context->sprite_index = context->sprite_draws = 0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5125 if (context->vcounter == 192) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5126 context->state = INACTIVE;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5127 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5128 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5129 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5130 TMS_SPRITE_SCAN_SLOT(248)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5131 TMS_SPRITE_SCAN_SLOT(249)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5132 TMS_SPRITE_SCAN_SLOT(250)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5133 TMS_SPRITE_SCAN_SLOT(251)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5134 TMS_SPRITE_SCAN_SLOT(252)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5135 TMS_SPRITE_SCAN_SLOT(253)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5136 TMS_SPRITE_SCAN_SLOT(254)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5137 TMS_SPRITE_SCAN_SLOT(255)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5138 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5139 default:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5140 context->hslot++;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5141 context->cycles += MCLKS_SLOT_H32;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5142 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5143 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5144
2260 3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5145 #define TMS_TEXT_OUTPUT(slot) if ((slot) < 8) { tms_border(context); } else { tms_composite(context); }
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5146 #define TMS_TEXT_BLOCK(slot) \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5147 case slot:\
2260 3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5148 TMS_TEXT_OUTPUT(slot)\
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5149 tms_fetch_pattern_name(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5150 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5151 case slot+1:\
2260 3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5152 TMS_TEXT_OUTPUT(slot+1)\
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5153 external_slot(context);\
2260 3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5154 TMS_CHECK_LIMIT \
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5155 case slot+2:\
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5156 TMS_TEXT_OUTPUT(slot+2)\
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5157 tms_fetch_pattern_value(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5158 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5159
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5160 static void vdp_tms_text(vdp_context * context, uint32_t target_cycles)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5161 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5162 switch (context->hslot)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5163 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5164 for (;;)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5165 {
2260 3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5166 case 0:
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5167 tms_border(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5168 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5169 TMS_CHECK_LIMIT
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5170 case 1:
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5171 tms_border(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5172 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5173 TMS_CHECK_LIMIT
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5174 case 2:
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5175 tms_border(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5176 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5177 TMS_CHECK_LIMIT
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5178 case 3:
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5179 tms_border(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5180 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5181 TMS_CHECK_LIMIT
2264 c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5182 case 4:
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5183 tms_border(context);
2260 3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5184 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5185 TMS_CHECK_LIMIT
2264 c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5186 TMS_TEXT_BLOCK(5)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5187 TMS_TEXT_BLOCK(8)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5188 TMS_TEXT_BLOCK(11)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5189 TMS_TEXT_BLOCK(14)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5190 TMS_TEXT_BLOCK(17)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5191 TMS_TEXT_BLOCK(20)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5192 TMS_TEXT_BLOCK(23)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5193 TMS_TEXT_BLOCK(26)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5194 TMS_TEXT_BLOCK(29)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5195 TMS_TEXT_BLOCK(32)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5196 TMS_TEXT_BLOCK(35)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5197 TMS_TEXT_BLOCK(38)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5198 TMS_TEXT_BLOCK(41)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5199 TMS_TEXT_BLOCK(44)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5200 TMS_TEXT_BLOCK(47)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5201 TMS_TEXT_BLOCK(50)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5202 TMS_TEXT_BLOCK(53)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5203 TMS_TEXT_BLOCK(56)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5204 TMS_TEXT_BLOCK(59)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5205 TMS_TEXT_BLOCK(62)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5206 TMS_TEXT_BLOCK(65)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5207 TMS_TEXT_BLOCK(68)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5208 TMS_TEXT_BLOCK(71)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5209 TMS_TEXT_BLOCK(74)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5210 TMS_TEXT_BLOCK(77)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5211 TMS_TEXT_BLOCK(80)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5212 TMS_TEXT_BLOCK(83)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5213 TMS_TEXT_BLOCK(86)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5214 TMS_TEXT_BLOCK(89)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5215 TMS_TEXT_BLOCK(92)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5216 TMS_TEXT_BLOCK(95)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5217 TMS_TEXT_BLOCK(98)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5218 TMS_TEXT_BLOCK(101)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5219 TMS_TEXT_BLOCK(104)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5220 TMS_TEXT_BLOCK(107)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5221 TMS_TEXT_BLOCK(110)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5222 TMS_TEXT_BLOCK(113)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5223 TMS_TEXT_BLOCK(116)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5224 TMS_TEXT_BLOCK(119)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5225 TMS_TEXT_BLOCK(122)
2260 3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5226 case 125:
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5227 tms_composite(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5228 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5229 TMS_CHECK_LIMIT
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5230 case 126:
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5231 tms_composite(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5232 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5233 TMS_CHECK_LIMIT
2264 c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5234 case 127:
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5235 tms_composite(context);
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5236 external_slot(context);
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5237 TMS_CHECK_LIMIT
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5238 default:
2260 3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5239 while (context->hslot < 139)
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5240 {
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5241 tms_border(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5242 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5243 TMS_CHECK_LIMIT
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5244 }
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5245 while (context->hslot < 147)
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5246 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5247 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5248 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5249 }
2260 3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5250 if (context->hslot == 147) {
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5251 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5252 context->hslot = 233;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5253 context->cycles += MCLKS_SLOT_H32;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5254 if (context->cycles >= target_cycles) { return; }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5255 }
2260 3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	5256 while (context->hslot > 147) {
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5257 if (context->hslot >= 233) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5258 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5259 if (context->hslot + 1 == LINE_CHANGE_MODE4) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5260 vdp_advance_line(context);
2264 c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5261 if (context->vcounter == 192) {
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5262 context->state = INACTIVE;
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5263 return;
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5264 }
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5265 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5266 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5267 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5268 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5269 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5270 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5271 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	5272
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5273 static void inactive_test_output(vdp_context *context, uint8_t is_h40, uint8_t test_layer)
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5274 {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5275 uint8_t max_slot = is_h40 ? 169 : 136;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5276 if (context->hslot > max_slot) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5277 return;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5278 }
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5279 uint8_t dst = context->compositebuf + (context->hslot >> 3) SCROLL_BUFFER_DRAW;
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5280 int32_t len;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5281 uint32_t src_off;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5282 if (context->hslot) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5283 dst -= SCROLL_BUFFER_DRAW - BORDER_LEFT;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5284 src_off = 0;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5285 len = context->hslot == max_slot ? BORDER_RIGHT : SCROLL_BUFFER_DRAW;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5286 } else {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5287 src_off = SCROLL_BUFFER_DRAW - BORDER_LEFT;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5288 len = BORDER_LEFT;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5289 }
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	5290 uint8_t *src = NULL;
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5291 if (test_layer == 2) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5292 //plane A
1871 e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	5293 src_off += context->buf_a_off - (context->hscroll_a & 0xF);
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5294 src = context->tmp_buf_a;
1369 3e7a921718de Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2 Michael Pavone <pavone@retrodev.com> parents: 1368 diff changeset	5295 } else if (test_layer == 3){
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5296 //plane B
1871 e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	5297 src_off += context->buf_b_off - (context->hscroll_b & 0xF);
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5298 src = context->tmp_buf_b;
1369 3e7a921718de Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2 Michael Pavone <pavone@retrodev.com> parents: 1368 diff changeset	5299 } else {
3e7a921718de Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2 Michael Pavone <pavone@retrodev.com> parents: 1368 diff changeset	5300 //sprite layer
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5301 memset(dst, 0, len);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5302 dst += len;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5303 len = 0;
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5304 }
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	5305 if (src) {
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	5306 for (; len >=0; len--, dst++, src_off++)
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	5307 {
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	5308 *dst = src[src_off & SCROLL_BUFFER_MASK] & 0x3F;
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	5309 }
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5310 }
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5311 context->done_composite = dst;
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5312 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_DRAW;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5313 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_DRAW;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5314 }
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5315
1362 83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	5316 static void check_switch_inactive(vdp_context *context, uint8_t is_h40)
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	5317 {
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	5318 //technically the second hcounter check should be different for H40, but this is probably close enough for now
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	5319 if (context->state == ACTIVE && context->vcounter == context->inactive_start && (context->hslot >= (is_h40 ? 167 : 135) \|\| context->hslot < 133)) {
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	5320 context->state = INACTIVE;
2010 19957e7353a4 Fix a regression in sprite rendering that could cause garbage to be displayed on first line Mike Pavone <pavone@retrodev.com> parents: 2009 diff changeset	5321 context->cur_slot = MAX_SPRITES_LINE-1;
19957e7353a4 Fix a regression in sprite rendering that could cause garbage to be displayed on first line Mike Pavone <pavone@retrodev.com> parents: 2009 diff changeset	5322 context->sprite_x_offset = 0;
1362 83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	5323 }
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	5324 }
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	5325
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5326 static void vdp_inactive(vdp_context *context, uint32_t target_cycles, uint8_t is_h40, uint8_t mode_5)
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	5327 {
1454 a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	5328 uint8_t buf_clear_slot, index_reset_slot, bg_end_slot, vint_slot, line_change, jump_start, jump_dest, latch_slot;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5329 uint8_t index_reset_value, max_draws, max_sprites;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5330 uint16_t vint_line, active_line;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	5331
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5332 if (mode_5) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5333 if (is_h40) {
1454 a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	5334 latch_slot = 165;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	5335 buf_clear_slot = 163;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	5336 index_reset_slot = 167;
1267 3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill Michael Pavone <pavone@retrodev.com> parents: 1191 diff changeset	5337 bg_end_slot = BG_START_SLOT + LINEBUF_SIZE/2;
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5338 max_draws = MAX_SPRITES_LINE-1;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5339 max_sprites = MAX_SPRITES_LINE;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5340 index_reset_value = 0x80;
1174 500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	5341 vint_slot = VINT_SLOT_H40;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5342 line_change = LINE_CHANGE_H40;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5343 jump_start = 182;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5344 jump_dest = 229;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5345 } else {
1267 3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill Michael Pavone <pavone@retrodev.com> parents: 1191 diff changeset	5346 bg_end_slot = BG_START_SLOT + (256+HORIZ_BORDER)/2;
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5347 max_draws = MAX_SPRITES_LINE_H32-1;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5348 max_sprites = MAX_SPRITES_LINE_H32;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5349 buf_clear_slot = 128;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5350 index_reset_slot = 132;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5351 index_reset_value = 0x80;
1174 500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	5352 vint_slot = VINT_SLOT_H32;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5353 line_change = LINE_CHANGE_H32;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5354 jump_start = 147;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5355 jump_dest = 233;
1454 a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	5356 latch_slot = 243;
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	5357 }
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5358 vint_line = context->inactive_start;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5359 active_line = 0x1FF;
1454 a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	5360 if (context->regs[REG_MODE_3] & BIT_VSCROLL) {
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	5361 latch_slot = 220;
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	5362 }
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	5363 } else {
1454 a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	5364 latch_slot = 220;
1267 3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill Michael Pavone <pavone@retrodev.com> parents: 1191 diff changeset	5365 bg_end_slot = BG_START_SLOT + (256+HORIZ_BORDER)/2;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5366 max_draws = MAX_DRAWS_H32_MODE4;
1278 34d3cb05014d Fix VDP buffer overrun that was causing sprite flickering in some games Michael Pavone <pavone@retrodev.com> parents: 1273 diff changeset	5367 max_sprites = 8;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5368 buf_clear_slot = 136;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5369 index_reset_slot = 253;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5370 index_reset_value = 0;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5371 vint_line = context->inactive_start + 1;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5372 vint_slot = VINT_SLOT_MODE4;
1177 67e0462c30ce Fix line advancement in Mode 4 during inactive display. Fix a Mode 4 VInt timing discrepency Michael Pavone <pavone@retrodev.com> parents: 1175 diff changeset	5373 line_change = LINE_CHANGE_MODE4;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5374 jump_start = 147;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5375 jump_dest = 233;
2263 a98b2d0de2f1 Fix TMS9918A first line sprite bug Michael Pavone <pavone@retrodev.com> parents: 2260 diff changeset	5376 if ((context->regs[REG_MODE_1] & BIT_MODE_4) \|\| context->type != VDP_GENESIS) {
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	5377 active_line = 0x1FF;
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5378 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5379 //never active unless either mode 4 or mode 5 is turned on
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5380 active_line = 0x200;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5381 }
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	5382 }
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	5383 pixel_t *dst;
1644 cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	5384 uint8_t *debug_dst;
2241 48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	5385 if (context->output && context->hslot >= BG_START_SLOT && context->hslot <= bg_end_slot) {
1644 cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	5386 dst = context->output + 2 * (context->hslot - BG_START_SLOT);
cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	5387 debug_dst = context->layer_debug_buf + 2 * (context->hslot - BG_START_SLOT);
cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	5388 } else {
cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	5389 dst = NULL;
cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	5390 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	5391
2675 dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	5392 uint8_t test_layer = context->test_regs[0] >> 7 & 3;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	5393
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5394 while(context->cycles < target_cycles)
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5395 {
1362 83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	5396 check_switch_inactive(context, is_h40);
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	5397 if (context->hslot == BG_START_SLOT && context->output) {
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5398 dst = context->output + (context->hslot - BG_START_SLOT) * 2;
1644 cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	5399 debug_dst = context->layer_debug_buf + 2 * (context->hslot - BG_START_SLOT);
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5400 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	5401 //this will need some tweaking to properly interact with 128K mode,
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5402 //but this should be good enough for now
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5403 context->serial_address += 1024;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5404 if (test_layer) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5405 switch (context->hslot & 7)
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5406 {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5407 case 3:
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5408 render_border_garbage(context, context->serial_address, context->tmp_buf_a, context->buf_a_off, context->col_1);
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5409 break;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5410 case 4:
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5411 render_border_garbage(context, context->serial_address, context->tmp_buf_a, context->buf_a_off+8, context->col_2);
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5412 break;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5413 case 7:
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5414 render_border_garbage(context, context->serial_address, context->tmp_buf_b, context->buf_b_off, context->col_1);
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5415 break;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5416 case 0:
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5417 render_border_garbage(context, context->serial_address, context->tmp_buf_b, context->buf_b_off+8, context->col_2);
1871 e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	5418 break;
e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	5419 case 1:
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5420 inactive_test_output(context, is_h40, test_layer);
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5421 break;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5422 }
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	5423 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	5424
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5425 if (context->hslot == buf_clear_slot) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5426 if (mode_5) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5427 context->cur_slot = max_draws;
2263 a98b2d0de2f1 Fix TMS9918A first line sprite bug Michael Pavone <pavone@retrodev.com> parents: 2260 diff changeset	5428 } else if ((context->regs[REG_MODE_1] & BIT_MODE_4) \|\| context->type == VDP_GENESIS) {
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5429 context->cur_slot = context->sprite_index = MAX_DRAWS_H32_MODE4-1;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5430 context->sprite_draws = MAX_DRAWS_H32_MODE4;
2263 a98b2d0de2f1 Fix TMS9918A first line sprite bug Michael Pavone <pavone@retrodev.com> parents: 2260 diff changeset	5431 } else {
a98b2d0de2f1 Fix TMS9918A first line sprite bug Michael Pavone <pavone@retrodev.com> parents: 2260 diff changeset	5432 context->sprite_draws = 0;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5433 }
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5434 memset(context->linebuf, 0, LINEBUF_SIZE);
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5435 } else if (context->hslot == index_reset_slot) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5436 context->sprite_index = index_reset_value;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	5437 context->slot_counter = mode_5 ? 0 : max_sprites;
1454 a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	5438 } else if (context->hslot == latch_slot) {
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	5439 //it seems unlikely to me that vscroll actually gets latched when the display is off
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	5440 //but it's the only straightforward way to reconcile what I'm seeing between Skitchin
1454 a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	5441 //(which seems to expect vscroll to be latched early) and the intro of Gunstar Heroes
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	5442 //(which disables the display and ends up with garbage if vscroll is latched during that period)
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	5443 //without it. Some more tests are definitely needed
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	5444 context->vscroll_latch[0] = context->vsram[0];
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	5445 context->vscroll_latch[1] = context->vsram[1];
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5446 } else if (context->vcounter == vint_line && context->hslot == vint_slot) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5447 context->flags2 \|= FLAG2_VINT_PENDING;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5448 context->pending_vint_start = context->cycles;
1436 40c3be9f1af7 Fix timing of VDP ODD flag toggle Michael Pavone <pavone@retrodev.com> parents: 1432 diff changeset	5449 } else if (context->vcounter == context->inactive_start && context->hslot == 1 && (context->regs[REG_MODE_4] & BIT_INTERLACE)) {
40c3be9f1af7 Fix timing of VDP ODD flag toggle Michael Pavone <pavone@retrodev.com> parents: 1432 diff changeset	5450 context->flags2 ^= FLAG2_EVEN_FIELD;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5451 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	5452
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5453 if (dst) {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5454 uint8_t bg_index;
2685 da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB Michael Pavone <pavone@retrodev.com> parents: 2675 diff changeset	5455 pixel_t bg_color;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5456 if (mode_5) {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5457 bg_index = context->regs[REG_BG_COLOR] & 0x3F;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5458 bg_color = context->colors[bg_index];
2263 a98b2d0de2f1 Fix TMS9918A first line sprite bug Michael Pavone <pavone@retrodev.com> parents: 2260 diff changeset	5459 } else if ((context->regs[REG_MODE_1] & BIT_MODE_4) \|\| context->type != VDP_GENESIS) {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5460 bg_index = 0x10 + (context->regs[REG_BG_COLOR] & 0xF);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5461 bg_color = context->colors[MODE4_OFFSET + bg_index];
1913 2c742812bcbb Fix regression at the very start of The Revenge of Shinobi Michael Pavone <pavone@retrodev.com> parents: 1906 diff changeset	5462 } else {
2264 c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	5463 bg_color = context->color_map[0];
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5464 }
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5465 if (context->done_composite) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5466 uint8_t pixel = context->compositebuf[dst-context->output];
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5467 if (!(pixel & 0x3F \| test_layer)) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5468 pixel = pixel & 0xC0 \| bg_index;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5469 }
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5470 *(dst++) = context->colors[pixel];
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5471 if ((dst - context->output) == (context->done_composite - context->compositebuf)) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5472 context->done_composite = NULL;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5473 memset(context->compositebuf, 0, sizeof(context->compositebuf));
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5474 }
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5475 } else {
1343 033dda2d4598 Fix transition from active to inactive display Michael Pavone <pavone@retrodev.com> parents: 1342 diff changeset	5476 *(dst++) = bg_color;
1644 cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	5477 *(debug_dst++) = DBG_SRC_BG;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5478 }
2241 48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	5479 if (context->hslot != bg_end_slot) {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5480 if (context->done_composite) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5481 uint8_t pixel = context->compositebuf[dst-context->output];
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5482 if (!(pixel & 0x3F \| test_layer)) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5483 pixel = pixel & 0xC0 \| bg_index;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5484 }
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5485 *(dst++) = context->colors[pixel];
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5486 if ((dst - context->output) == (context->done_composite - context->compositebuf)) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5487 context->done_composite = NULL;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5488 memset(context->compositebuf, 0, sizeof(context->compositebuf));
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5489 }
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5490 } else {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5491 *(dst++) = bg_color;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5492 *(debug_dst++) = DBG_SRC_BG;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	5493 }
1267 3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill Michael Pavone <pavone@retrodev.com> parents: 1191 diff changeset	5494 }
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5495 }
2241 48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	5496 if (context->hslot == bg_end_slot) {
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	5497 advance_output_line(context);
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	5498 dst = NULL;
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	5499 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	5500
1183 8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	5501 if (!is_refresh(context, context->hslot)) {
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	5502 external_slot(context);
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	5503 if (context->flags & FLAG_DMA_RUN && !is_refresh(context, context->hslot)) {
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	5504 run_dma_src(context, context->hslot);
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	5505 }
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	5506 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	5507
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5508 if (is_h40) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5509 if (context->hslot >= HSYNC_SLOT_H40 && context->hslot < HSYNC_END_H40) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5510 context->cycles += h40_hsync_cycles[context->hslot - HSYNC_SLOT_H40];
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5511 } else {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5512 context->cycles += MCLKS_SLOT_H40;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5513 }
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5514 } else {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5515 context->cycles += MCLKS_SLOT_H32;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5516 }
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	5517 if (context->hslot == jump_start) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	5518 context->hslot = jump_dest;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	5519 } else {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	5520 context->hslot++;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	5521 }
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5522 if (context->hslot == line_change) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5523 vdp_advance_line(context);
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5524 if (context->vcounter == active_line) {
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5525 context->state = PREPARING;
2567 8872c8e3e0fc Fix minor regression in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 2566 diff changeset	5526 if (!context->done_composite) {
8872c8e3e0fc Fix minor regression in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 2566 diff changeset	5527 memset(context->compositebuf, 0, sizeof(context->compositebuf));
8872c8e3e0fc Fix minor regression in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 2566 diff changeset	5528 }
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5529 return;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5530 }
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	5531 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	5532 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	5533 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	5534
2686 05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5535 static void vdp_inactive_phony(vdp_context *context, uint32_t target_cycles, uint8_t is_h40, uint8_t mode_5)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5536 {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5537 uint8_t buf_clear_slot, index_reset_slot, bg_end_slot, vint_slot, line_change, jump_start, jump_dest, latch_slot;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5538 uint8_t index_reset_value, max_draws, max_sprites;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5539 uint16_t vint_line, active_line;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5540
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5541 if (mode_5) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5542 if (is_h40) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5543 latch_slot = 165;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5544 buf_clear_slot = 163;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5545 index_reset_slot = 167;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5546 bg_end_slot = BG_START_SLOT + LINEBUF_SIZE/2;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5547 max_draws = MAX_SPRITES_LINE-1;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5548 max_sprites = MAX_SPRITES_LINE;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5549 index_reset_value = 0x80;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5550 vint_slot = VINT_SLOT_H40;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5551 line_change = LINE_CHANGE_H40;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5552 jump_start = 182;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5553 jump_dest = 229;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5554 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5555 bg_end_slot = BG_START_SLOT + (256+HORIZ_BORDER)/2;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5556 max_draws = MAX_SPRITES_LINE_H32-1;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5557 max_sprites = MAX_SPRITES_LINE_H32;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5558 buf_clear_slot = 128;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5559 index_reset_slot = 132;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5560 index_reset_value = 0x80;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5561 vint_slot = VINT_SLOT_H32;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5562 line_change = LINE_CHANGE_H32;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5563 jump_start = 147;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5564 jump_dest = 233;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5565 latch_slot = 243;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5566 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5567 vint_line = context->inactive_start;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5568 active_line = 0x1FF;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5569 if (context->regs[REG_MODE_3] & BIT_VSCROLL) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5570 latch_slot = 220;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5571 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5572 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5573 latch_slot = 220;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5574 bg_end_slot = BG_START_SLOT + (256+HORIZ_BORDER)/2;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5575 max_draws = MAX_DRAWS_H32_MODE4;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5576 max_sprites = 8;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5577 buf_clear_slot = 136;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5578 index_reset_slot = 253;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5579 index_reset_value = 0;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5580 vint_line = context->inactive_start + 1;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5581 vint_slot = VINT_SLOT_MODE4;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5582 line_change = LINE_CHANGE_MODE4;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5583 jump_start = 147;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5584 jump_dest = 233;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5585 if ((context->regs[REG_MODE_1] & BIT_MODE_4) \|\| context->type != VDP_GENESIS) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5586 active_line = 0x1FF;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5587 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5588 //never active unless either mode 4 or mode 5 is turned on
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5589 active_line = 0x200;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5590 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5591 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5592
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5593 while(context->cycles < target_cycles)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5594 {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5595 check_switch_inactive(context, is_h40);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5596 //this will need some tweaking to properly interact with 128K mode,
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5597 //but this should be good enough for now
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5598 context->serial_address += 1024;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5599
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5600 if (context->hslot == buf_clear_slot) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5601 if (mode_5) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5602 context->cur_slot = max_draws;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5603 } else if ((context->regs[REG_MODE_1] & BIT_MODE_4) \|\| context->type == VDP_GENESIS) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5604 context->cur_slot = context->sprite_index = MAX_DRAWS_H32_MODE4-1;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5605 context->sprite_draws = MAX_DRAWS_H32_MODE4;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5606 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5607 context->sprite_draws = 0;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5608 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5609 memset(context->linebuf, 0, LINEBUF_SIZE);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5610 } else if (context->hslot == index_reset_slot) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5611 context->sprite_index = index_reset_value;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5612 context->slot_counter = mode_5 ? 0 : max_sprites;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5613 } else if (context->vcounter == vint_line && context->hslot == vint_slot) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5614 context->flags2 \|= FLAG2_VINT_PENDING;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5615 context->pending_vint_start = context->cycles;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5616 } else if (context->vcounter == context->inactive_start && context->hslot == 1 && (context->regs[REG_MODE_4] & BIT_INTERLACE)) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5617 context->flags2 ^= FLAG2_EVEN_FIELD;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5618 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5619
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5620 if (!is_refresh(context, context->hslot)) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5621 external_slot(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5622 if (context->flags & FLAG_DMA_RUN && !is_refresh(context, context->hslot)) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5623 run_dma_src(context, context->hslot);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5624 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5625 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5626
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5627 if (is_h40) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5628 if (context->hslot >= HSYNC_SLOT_H40 && context->hslot < HSYNC_END_H40) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5629 context->cycles += h40_hsync_cycles[context->hslot - HSYNC_SLOT_H40];
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5630 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5631 context->cycles += MCLKS_SLOT_H40;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5632 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5633 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5634 context->cycles += MCLKS_SLOT_H32;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5635 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5636 if (context->hslot == jump_start) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5637 context->hslot = jump_dest;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5638 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5639 context->hslot++;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5640 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5641 if (context->hslot == line_change) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5642 vdp_advance_line(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5643 if (context->vcounter == active_line) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5644 context->state = PREPARING;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5645 return;
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5646 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5647 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5648 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5649 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5650
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	5651 void vdp_run_context_full(vdp_context * context, uint32_t target_cycles)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	5652 {
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	5653 uint8_t is_h40 = context->regs[REG_MODE_4] & BIT_H40;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	5654 uint8_t mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5;
2686 05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5655 if (context->renderer) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5656 while(context->cycles < target_cycles)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5657 {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5658 check_switch_inactive(context, is_h40);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5659
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5660 if (is_active(context)) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5661 if (mode_5) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5662 if (is_h40) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5663 vdp_h40_phony(context, target_cycles);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5664 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5665 vdp_h32_phony(context, target_cycles);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5666 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5667 } else if (context->regs[REG_MODE_1] & BIT_MODE_4) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5668 //TODO: phonyfy this
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5669 vdp_h32_mode4(context, target_cycles);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5670 } else if (context->regs[REG_MODE_2] & BIT_M1) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5671 vdp_tms_text(context, target_cycles);
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	5672 } else {
2686 05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5673 vdp_tms_graphics(context, target_cycles);
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	5674 }
330 57453d3d8be4 Initial stab at implementing funky clock adjustments during HSYNC for H40 mode Mike Pavone <pavone@retrodev.com> parents: 329 diff changeset	5675 } else {
2686 05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5676 vdp_inactive_phony(context, target_cycles, is_h40, mode_5);
330 57453d3d8be4 Initial stab at implementing funky clock adjustments during HSYNC for H40 mode Mike Pavone <pavone@retrodev.com> parents: 329 diff changeset	5677 }
2686 05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5678 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5679 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5680 while(context->cycles < target_cycles)
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5681 {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5682 check_switch_inactive(context, is_h40);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5683
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5684 if (is_active(context)) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5685 if (mode_5) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5686 if (is_h40) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5687 vdp_h40(context, target_cycles);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5688 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5689 vdp_h32(context, target_cycles);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5690 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5691 } else if (context->regs[REG_MODE_1] & BIT_MODE_4) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5692 vdp_h32_mode4(context, target_cycles);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5693 } else if (context->regs[REG_MODE_2] & BIT_M1) {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5694 vdp_tms_text(context, target_cycles);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5695 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5696 vdp_tms_graphics(context, target_cycles);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5697 }
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5698 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5699 vdp_inactive(context, target_cycles, is_h40, mode_5);
05915f01046d WIP attempt to move VDP rendering to a separate thread Michael Pavone <pavone@retrodev.com> parents: 2685 diff changeset	5700 }
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	5701 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	5702 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	5703 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	5704
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	5705 void vdp_run_context(vdp_context *context, uint32_t target_cycles)
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	5706 {
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	5707 //TODO: Deal with H40 hsync shenanigans
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	5708 uint32_t slot_cyc = context->regs[REG_MODE_4] & BIT_H40 ? 15 : 19;
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	5709 if (target_cycles < slot_cyc) {
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	5710 //avoid overflow
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	5711 return;
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	5712 }
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	5713 vdp_run_context_full(context, target_cycles - slot_cyc);
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	5714 }
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	5715
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	5716 uint32_t vdp_run_to_vblank(vdp_context * context)
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	5717 {
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	5718 uint32_t old_frame = context->frame;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	5719 while (context->frame == old_frame) {
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	5720 vdp_run_context_full(context, context->cycles + MCLKS_LINE);
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	5721 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	5722 return context->cycles;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	5723 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	5724
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	5725 void vdp_run_dma_done(vdp_context * context, uint32_t target_cycles)
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	5726 {
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	5727 for(;;) {
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	5728 uint32_t dmalen = (context->regs[REG_DMALEN_H] << 8) \| context->regs[REG_DMALEN_L];
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	5729 if (!dmalen) {
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	5730 dmalen = 0x10000;
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	5731 }
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	5732 uint32_t min_dma_complete = dmalen * (context->regs[REG_MODE_4] & BIT_H40 ? 16 : 20);
1321 0849e9356bfe Fix time 68K is locked out of bus when doing a 128KB VRAM mode DMA transfer. Fixes a number of problems in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1320 diff changeset	5733 if (
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	5734 (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_COPY
1321 0849e9356bfe Fix time 68K is locked out of bus when doing a 128KB VRAM mode DMA transfer. Fixes a number of problems in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1320 diff changeset	5735 \|\| (((context->cd & 0xF) == VRAM_WRITE) && !(context->regs[REG_MODE_2] & BIT_128K_VRAM))) {
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	5736 //DMA copies take twice as long to complete since they require a read and a write
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	5737 //DMA Fills and transfers to VRAM also take twice as long as it requires 2 writes for a single word
1321 0849e9356bfe Fix time 68K is locked out of bus when doing a 128KB VRAM mode DMA transfer. Fixes a number of problems in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1320 diff changeset	5738 //unless 128KB mode is enabled
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	5739 min_dma_complete *= 2;
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	5740 }
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	5741 min_dma_complete += context->cycles;
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	5742 if (target_cycles < min_dma_complete) {
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	5743 vdp_run_context_full(context, target_cycles);
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	5744 return;
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	5745 } else {
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	5746 vdp_run_context_full(context, min_dma_complete);
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	5747 if (!(context->flags & FLAG_DMA_RUN)) {
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	5748 return;
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	5749 }
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	5750 }
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	5751 }
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	5752 }
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	5753
1154 c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	5754 static uint16_t get_ext_vcounter(vdp_context *context)
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	5755 {
1437 da72344af3ff Fix external v counter when normal resolution interlace mode is active Michael Pavone <pavone@retrodev.com> parents: 1436 diff changeset	5756 uint16_t line= context->vcounter;
da72344af3ff Fix external v counter when normal resolution interlace mode is active Michael Pavone <pavone@retrodev.com> parents: 1436 diff changeset	5757 if (context->regs[REG_MODE_4] & BIT_INTERLACE) {
da72344af3ff Fix external v counter when normal resolution interlace mode is active Michael Pavone <pavone@retrodev.com> parents: 1436 diff changeset	5758 if (context->double_res) {
da72344af3ff Fix external v counter when normal resolution interlace mode is active Michael Pavone <pavone@retrodev.com> parents: 1436 diff changeset	5759 line <<= 1;
da72344af3ff Fix external v counter when normal resolution interlace mode is active Michael Pavone <pavone@retrodev.com> parents: 1436 diff changeset	5760 } else {
da72344af3ff Fix external v counter when normal resolution interlace mode is active Michael Pavone <pavone@retrodev.com> parents: 1436 diff changeset	5761 line &= 0x1FE;
da72344af3ff Fix external v counter when normal resolution interlace mode is active Michael Pavone <pavone@retrodev.com> parents: 1436 diff changeset	5762 }
1154 c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	5763 if (line & 0x100) {
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	5764 line \|= 1;
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	5765 }
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	5766 }
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	5767 return line << 8;
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	5768 }
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	5769
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	5770 void vdp_latch_hv(vdp_context *context)
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	5771 {
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	5772 context->hv_latch = context->hslot \| get_ext_vcounter(context);
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	5773 }
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	5774
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	5775 uint16_t vdp_hv_counter_read(vdp_context * context)
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	5776 {
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	5777 if ((context->regs[REG_MODE_2] & BIT_MODE_5) && (context->regs[REG_MODE_1] & BIT_HVC_LATCH)) {
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	5778 return context->hv_latch;
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	5779 }
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	5780 uint16_t hv;
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	5781 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	5782 hv = context->hslot;
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	5783 } else {
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	5784 hv = context->hv_latch & 0xFF;
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	5785 }
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	5786 hv \|= get_ext_vcounter(context);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	5787
1154 c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	5788 return hv;
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	5789 }
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	5790
2359 04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5791 void vdp_reg_write(vdp_context *context, uint16_t reg, uint16_t value)
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5792 {
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5793 uint8_t mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5;
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5794 if (reg < (mode_5 ? VDP_REGS : 0xB)) {
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5795 //printf("register %d set to %X\n", reg, value & 0xFF);
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5796 if (reg == REG_MODE_1 && (value & BIT_HVC_LATCH) && !(context->regs[reg] & BIT_HVC_LATCH)) {
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5797 vdp_latch_hv(context);
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5798 } else if (reg == REG_BG_COLOR) {
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5799 value &= 0x3F;
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5800 } else if (reg == REG_MODE_2 && context->type != VDP_GENESIS) {
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5801 // only the Genesis VDP does anything with this bit
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5802 // so just clear it to prevent Mode 5 selection if we're not emulating that chip
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5803 value &= ~BIT_MODE_5;
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5804 }
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5805 /*if (reg == REG_MODE_4 && ((value ^ context->regs[reg]) & BIT_H40)) {
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5806 printf("Mode changed from H%d to H%d @ %d, frame: %d\n", context->regs[reg] & BIT_H40 ? 40 : 32, value & BIT_H40 ? 40 : 32, context->cycles, context->frame);
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5807 }*/
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5808 uint8_t buffer[2] = {reg, value};
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5809 event_log(EVENT_VDP_REG, context->cycles, sizeof(buffer), buffer);
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5810 context->regs[reg] = value;
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5811 if (reg == REG_MODE_1 \|\| reg == REG_MODE_2 \|\| reg == REG_MODE_4) {
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5812 update_video_params(context);
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5813 }
2559 e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5814 } else if (context->type == VDP_GENESIS) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5815 // Apparently Bart vs. the Space Mutants for SMS/GG writes to the timer KMOD timer register
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5816 // Probably need to add some sort of config toggle for KMOD registers generally, but this is a quick fix
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5817 if (reg == REG_KMOD_CTRL) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5818 if (!(value & 0xFF)) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5819 context->system->enter_debugger = 1;
2359 04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5820 }
2559 e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5821 } else if (reg == REG_KMOD_MSG) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5822 char c = value;
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5823 if (c) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5824 context->kmod_buffer_length++;
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5825 if ((context->kmod_buffer_length + 1) > context->kmod_buffer_storage) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5826 context->kmod_buffer_storage = context->kmod_buffer_storage ? context->kmod_buffer_storage * 2 : 128;
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5827 context->kmod_msg_buffer = realloc(context->kmod_msg_buffer, context->kmod_buffer_storage);
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5828 }
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5829 context->kmod_msg_buffer[context->kmod_buffer_length - 1] = c;
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5830 } else if (context->kmod_buffer_length) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5831 context->kmod_msg_buffer[context->kmod_buffer_length] = 0;
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5832 if (is_stdout_enabled()) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5833 init_terminal();
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5834 printf("KDEBUG MESSAGE: %s\n", context->kmod_msg_buffer);
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5835 } else {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5836 // GDB remote debugging is enabled, use stderr instead
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5837 fprintf(stderr, "KDEBUG MESSAGE: %s\n", context->kmod_msg_buffer);
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5838 }
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5839 context->kmod_buffer_length = 0;
2359 04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5840 }
2559 e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5841 } else if (reg == REG_KMOD_TIMER) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5842 if (!(value & 0x80)) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5843 if (is_stdout_enabled()) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5844 init_terminal();
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5845 printf("KDEBUG TIMER: %d\n", (context->cycles - context->timer_start_cycle) / 7);
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5846 } else {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5847 // GDB remote debugging is enabled, use stderr instead
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5848 fprintf(stderr, "KDEBUG TIMER: %d\n", (context->cycles - context->timer_start_cycle) / 7);
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5849 }
2359 04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5850 }
2559 e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5851 if (value & 0xC0) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5852 context->timer_start_cycle = context->cycles;
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP Michael Pavone <pavone@retrodev.com> parents: 2557 diff changeset	5853 }
2359 04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5854 }
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5855 }
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5856 }
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5857
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	5858 int vdp_control_port_write(vdp_context * context, uint16_t value, uint32_t cpu_cycle)
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	5859 {
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	5860 //printf("control port write: %X at %d\n", value, context->cycles);
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	5861 if (context->flags & FLAG_PENDING) {
2223 1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	5862 context->address_latch = value << 14 & 0x1C000;
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	5863 context->address = (context->address & 0x3FFF) \| context->address_latch;
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	5864 //It seems like the DMA enable bit doesn't so much enable DMA so much
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	5865 //as it enables changing CD5 from control port writes
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	5866 if (context->regs[REG_MODE_2] & BIT_DMA_ENABLE) {
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	5867 context->cd = (context->cd & 0x3) \| ((value >> 2) & ~0x3 & 0xFF);
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	5868 } else {
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	5869 context->cd = (context->cd & 0x23) \| ((value >> 2) & ~0x23 & 0xFF);
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	5870 }
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	5871 context->flags &= ~FLAG_PENDING;
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	5872 //Should these be taken care of here or after the first write?
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	5873 context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	5874 context->flags2 &= ~FLAG2_READ_PENDING;
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	5875 if (!(context->cd & 1)) {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	5876 context->read_latency = cpu_cycle + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*READ_LATENCY;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	5877 }
453 b491df8bdbc0 Adjust VBLANK flag and refresh timing to be in line with logic analyzer and visual observations of direct color DMA demos. Remove debug print statements. Mike Pavone <pavone@retrodev.com> parents: 452 diff changeset	5878 //printf("New Address: %X, New CD: %X\n", context->address, context->cd);
983 14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing. Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	5879 if (context->cd & 0x20) {
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	5880 //
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	5881 if((context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) != DMA_FILL) {
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	5882 //DMA copy or 68K -> VDP, transfer starts immediately
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5883 //printf("DMA start (length: %X) at cycle %d, frame: %d, vcounter: %d, hslot: %d\n", (context->regs[REG_DMALEN_H] << 8) \| context->regs[REG_DMALEN_L], context->cycles, context->frame, context->vcounter, context->hslot);
1191 8dc50e50ced6 Remove accidentally committed debug logging Michael Pavone <pavone@retrodev.com> parents: 1189 diff changeset	5884 if (!(context->regs[REG_DMASRC_H] & 0x80)) {
8dc50e50ced6 Remove accidentally committed debug logging Michael Pavone <pavone@retrodev.com> parents: 1189 diff changeset	5885 //printf("DMA Address: %X, New CD: %X, Source: %X, Length: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_H] << 17) \| (context->regs[REG_DMASRC_M] << 9) \| (context->regs[REG_DMASRC_L] << 1), context->regs[REG_DMALEN_H] << 8 \| context->regs[REG_DMALEN_L]);
1289 6ad59a62e656 Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM Michael Pavone <pavone@retrodev.com> parents: 1285 diff changeset	5886 //68K -> VDP DMA takes a few slots to actually start reading even though it acquires the bus immediately
6ad59a62e656 Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM Michael Pavone <pavone@retrodev.com> parents: 1285 diff changeset	5887 //logic analyzer captures made it seem like the proper value is 4 slots, but that seems to cause trouble with the Nemesis' FIFO Wait State test
6ad59a62e656 Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM Michael Pavone <pavone@retrodev.com> parents: 1285 diff changeset	5888 //only captures are from a direct color DMA demo which will generally start DMA at a very specific point in display so other values are plausible
6ad59a62e656 Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM Michael Pavone <pavone@retrodev.com> parents: 1285 diff changeset	5889 //sticking with 3 slots for now until I can do some more captures
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	5890 vdp_run_context_full(context, context->cycles + 12 * ((context->regs[REG_MODE_2] & BIT_MODE_5) && (context->regs[REG_MODE_4] & BIT_H40) ? 4 : 5));
2361 3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	5891 vdp_dma_started();
1285 76e47254596b Remove hacky post-DMA delay add proper pre-DMA delay based on logic analyzer capture. 512 color screen is a bit messed up but mostly works. Needs investigation Michael Pavone <pavone@retrodev.com> parents: 1278 diff changeset	5892 context->flags \|= FLAG_DMA_RUN;
2361 3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	5893 if (context->dma_hook) {
3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	5894 context->dma_hook(context);
3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	5895 }
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	5896 return 1;
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	5897 } else {
1285 76e47254596b Remove hacky post-DMA delay add proper pre-DMA delay based on logic analyzer capture. 512 color screen is a bit messed up but mostly works. Needs investigation Michael Pavone <pavone@retrodev.com> parents: 1278 diff changeset	5898 context->flags \|= FLAG_DMA_RUN;
2361 3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	5899 if (context->dma_hook) {
3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	5900 context->dma_hook(context);
3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	5901 }
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	5902 //printf("DMA Copy Address: %X, New CD: %X, Source: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_M] << 8) \| context->regs[REG_DMASRC_L]);
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	5903 }
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	5904 } else {
453 b491df8bdbc0 Adjust VBLANK flag and refresh timing to be in line with logic analyzer and visual observations of direct color DMA demos. Remove debug print statements. Mike Pavone <pavone@retrodev.com> parents: 452 diff changeset	5905 //printf("DMA Fill Address: %X, New CD: %X\n", context->address, context->cd);
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	5906 }
63 a6dd5b7a971b Add FPS counter to console output Mike Pavone <pavone@retrodev.com> parents: 58 diff changeset	5907 }
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	5908 } else {
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	5909 uint8_t mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5;
2223 1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	5910 context->address = context->address_latch \| (value & 0x3FFF);
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	5911 context->cd = (context->cd & 0x3C) \| (value >> 14);
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	5912 if ((value & 0xC000) == 0x8000) {
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	5913 //Register write
2359 04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5914 uint16_t reg = (value >> 8) & 0x1F;
2361 3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	5915 if (context->reg_hook) {
3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	5916 context->reg_hook(context, reg, value);
3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	5917 }
2359 04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	5918 vdp_reg_write(context, reg, value);
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	5919 } else if (mode_5) {
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	5920 context->flags \|= FLAG_PENDING;
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	5921 //Should these be taken care of here or after the second write?
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	5922 //context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	5923 //context->flags2 &= ~FLAG2_READ_PENDING;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	5924 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	5925 context->flags &= ~FLAG_READ_FETCHED;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	5926 context->flags2 &= ~FLAG2_READ_PENDING;
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	5927 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	5928 }
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	5929 return 0;
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	5930 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	5931
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	5932 void vdp_control_port_write_pbc(vdp_context *context, uint8_t value)
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	5933 {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	5934 if (context->flags2 & FLAG2_BYTE_PENDING) {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	5935 uint16_t full_val = value << 8 \| context->pending_byte;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	5936 context->flags2 &= ~FLAG2_BYTE_PENDING;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	5937 //TODO: Deal with fact that Vbus->VDP DMA doesn't do anything in PBC mode
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	5938 vdp_control_port_write(context, full_val, context->cycles);
1151 681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	5939 if (context->cd == VRAM_READ) {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	5940 context->cd = VRAM_READ8;
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	5941 }
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	5942 } else {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	5943 context->pending_byte = value;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	5944 context->flags2 \|= FLAG2_BYTE_PENDING;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	5945 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	5946 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	5947
2571 3d14db924e57 DMA fill and copy should not block VDP data or control port writes Michael Pavone <pavone@retrodev.com> parents: 2570 diff changeset	5948 void vdp_data_port_write(vdp_context * context, uint16_t value)
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	5949 {
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	5950 //printf("data port write: %X at %d\n", value, context->cycles);
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	5951 if (context->flags & FLAG_PENDING) {
2223 1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	5952 context->flags &= ~FLAG_PENDING;
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	5953 //Should these be cleared here?
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	5954 context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	5955 context->flags2 &= ~FLAG2_READ_PENDING;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	5956 }
109 004dd46e0a97 COmment out fifo full debug printf Mike Pavone <pavone@retrodev.com> parents: 108 diff changeset	5957 /*if (context->fifo_cur == context->fifo_end) {
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	5958 printf("FIFO full, waiting for space before next write at cycle %X\n", context->cycles);
109 004dd46e0a97 COmment out fifo full debug printf Mike Pavone <pavone@retrodev.com> parents: 108 diff changeset	5959 }*/
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	5960 if (context->cd & 0x20 && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL) {
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	5961 context->flags &= ~FLAG_DMA_RUN;
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	5962 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	5963 while (context->fifo_write == context->fifo_read) {
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	5964 vdp_run_context_full(context, context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20));
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	5965 }
2361 3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	5966 if (context->data_hook) {
3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	5967 context->data_hook(context, value);
3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	5968 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	5969 fifo_entry * cur = context->fifo + context->fifo_write;
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	5970 cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY;
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	5971 cur->address = context->address;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	5972 cur->value = value;
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	5973 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	5974 cur->cd = context->cd;
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	5975 } else {
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	5976 cur->cd = (context->cd & 2) \| 1;
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	5977 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	5978 cur->partial = 0;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	5979 if (context->fifo_read < 0) {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	5980 context->fifo_read = context->fifo_write;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	5981 }
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	5982 context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1);
1151 681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	5983 increment_address(context);
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	5984 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	5985
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	5986 void vdp_data_port_write_pbc(vdp_context * context, uint8_t value)
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	5987 {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	5988 if (context->flags & FLAG_PENDING) {
2223 1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	5989 context->flags &= ~FLAG_PENDING;
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	5990 //Should these be cleared here?
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	5991 context->flags &= ~FLAG_READ_FETCHED;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	5992 context->flags2 &= ~FLAG2_READ_PENDING;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	5993 }
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	5994 context->flags2 &= ~FLAG2_BYTE_PENDING;
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	5995 /*if (context->fifo_cur == context->fifo_end) {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	5996 printf("FIFO full, waiting for space before next write at cycle %X\n", context->cycles);
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	5997 }*/
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	5998 if (context->cd & 0x20 && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL) {
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	5999 context->flags &= ~FLAG_DMA_RUN;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	6000 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	6001 while (context->fifo_write == context->fifo_read) {
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	6002 vdp_run_context_full(context, context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20));
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	6003 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	6004 fifo_entry * cur = context->fifo + context->fifo_write;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	6005 cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	6006 cur->address = context->address;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	6007 cur->value = value;
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	6008 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	6009 cur->cd = context->cd;
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	6010 } else {
2473 cf3e8a19aa25 Fix Ax Battler: A Legend of Golden Axe Michael Pavone <pavone@retrodev.com> parents: 2465 diff changeset	6011 if ((context->cd & 3) == CRAM_WRITE) {
cf3e8a19aa25 Fix Ax Battler: A Legend of Golden Axe Michael Pavone <pavone@retrodev.com> parents: 2465 diff changeset	6012 cur->cd = CRAM_WRITE;
cf3e8a19aa25 Fix Ax Battler: A Legend of Golden Axe Michael Pavone <pavone@retrodev.com> parents: 2465 diff changeset	6013 } else {
cf3e8a19aa25 Fix Ax Battler: A Legend of Golden Axe Michael Pavone <pavone@retrodev.com> parents: 2465 diff changeset	6014 cur->cd = VRAM_WRITE;
cf3e8a19aa25 Fix Ax Battler: A Legend of Golden Axe Michael Pavone <pavone@retrodev.com> parents: 2465 diff changeset	6015 }
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	6016 }
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	6017 cur->partial = 3;
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	6018 if (context->fifo_read < 0) {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	6019 context->fifo_read = context->fifo_write;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	6020 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	6021 context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1);
1151 681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	6022 increment_address(context);
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	6023 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	6024
2675 dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	6025 void vdp_test_port_select(vdp_context * context, uint16_t value)
dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	6026 {
dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	6027 context->selected_test_reg = value >> 8 & 0xF;
dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	6028 }
dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	6029
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	6030 void vdp_test_port_write(vdp_context * context, uint16_t value)
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	6031 {
2675 dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	6032 if (context->selected_test_reg < 8) {
dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	6033 context->test_regs[context->selected_test_reg] = value;
dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	6034 }
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	6035 }
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	6036
2358 4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support Michael Pavone <pavone@retrodev.com> parents: 2338 diff changeset	6037 uint16_t vdp_status(vdp_context *context)
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	6038 {
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	6039 //Bits 15-10 are not fixed like Charles MacDonald's doc suggests, but instead open bus values that reflect 68K prefetch
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	6040 uint16_t value = context->system->get_open_bus_value(context->system) & 0xFC00;
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	6041 if (context->fifo_read < 0) {
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	6042 value \|= 0x200;
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	6043 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	6044 if (context->fifo_read == context->fifo_write) {
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	6045 value \|= 0x100;
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	6046 }
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	6047 if (context->flags2 & FLAG2_VINT_PENDING) {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	6048 value \|= 0x80;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	6049 }
2574 0da40b1978fd Sprite overflow flag should only be set when there are too many sprites in a line and not when there are just too many sprite pixels. Fixes regression in Madou Monogatari I Michael Pavone <pavone@retrodev.com> parents: 2572 diff changeset	6050 if (context->flags & FLAG_SPRITE_OFLOW) {
494 8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags Mike Pavone <pavone@retrodev.com> parents: 481 diff changeset	6051 value \|= 0x40;
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags Mike Pavone <pavone@retrodev.com> parents: 481 diff changeset	6052 }
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags Mike Pavone <pavone@retrodev.com> parents: 481 diff changeset	6053 if (context->flags2 & FLAG2_SPRITE_COLLIDE) {
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags Mike Pavone <pavone@retrodev.com> parents: 481 diff changeset	6054 value \|= 0x20;
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags Mike Pavone <pavone@retrodev.com> parents: 481 diff changeset	6055 }
1077 1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode. Michael Pavone <pavone@retrodev.com> parents: 1076 diff changeset	6056 if ((context->regs[REG_MODE_4] & BIT_INTERLACE) && !(context->flags2 & FLAG2_EVEN_FIELD)) {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	6057 value \|= 0x10;
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	6058 }
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	6059 uint32_t slot = context->hslot;
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6060 if (!is_active(context)) {
318 789f2f5f2277 Implement hblank flag in status register Mike Pavone <pavone@retrodev.com> parents: 317 diff changeset	6061 value \|= 0x8;
789f2f5f2277 Implement hblank flag in status register Mike Pavone <pavone@retrodev.com> parents: 317 diff changeset	6062 }
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	6063 if (context->regs[REG_MODE_4] & BIT_H40) {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	6064 if (slot < HBLANK_END_H40 \|\| slot > HBLANK_START_H40) {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	6065 value \|= 0x4;
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	6066 }
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	6067 } else {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	6068 if (slot < HBLANK_END_H32 \|\| slot > HBLANK_START_H32) {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	6069 value \|= 0x4;
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	6070 }
318 789f2f5f2277 Implement hblank flag in status register Mike Pavone <pavone@retrodev.com> parents: 317 diff changeset	6071 }
983 14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing. Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	6072 if (context->cd & 0x20) {
141 576f55711d8d Fix DMA in progress flag in VDP status register Mike Pavone <pavone@retrodev.com> parents: 138 diff changeset	6073 value \|= 0x2;
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	6074 }
714 e29bc2918f69 Fix VDP status register PAL bit based on observations of the Titan Overdrive demo Michael Pavone <pavone@retrodev.com> parents: 711 diff changeset	6075 if (context->flags2 & FLAG2_REGION_PAL) {
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	6076 value \|= 0x1;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	6077 }
2358 4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support Michael Pavone <pavone@retrodev.com> parents: 2338 diff changeset	6078 return value;
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support Michael Pavone <pavone@retrodev.com> parents: 2338 diff changeset	6079 }
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support Michael Pavone <pavone@retrodev.com> parents: 2338 diff changeset	6080
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support Michael Pavone <pavone@retrodev.com> parents: 2338 diff changeset	6081 uint16_t vdp_control_port_read(vdp_context * context)
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support Michael Pavone <pavone@retrodev.com> parents: 2338 diff changeset	6082 {
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support Michael Pavone <pavone@retrodev.com> parents: 2338 diff changeset	6083 uint16_t value = vdp_status(context);
2574 0da40b1978fd Sprite overflow flag should only be set when there are too many sprites in a line and not when there are just too many sprite pixels. Fixes regression in Madou Monogatari I Michael Pavone <pavone@retrodev.com> parents: 2572 diff changeset	6084 context->flags &= ~(FLAG_SPRITE_OFLOW\|FLAG_PENDING);
2358 4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support Michael Pavone <pavone@retrodev.com> parents: 2338 diff changeset	6085 context->flags2 &= ~(FLAG2_SPRITE_COLLIDE\|FLAG2_BYTE_PENDING);
459 c49ecf575784 Revert change to VBLANK flag timing based on new direct color DMA test Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	6086 //printf("status read at cycle %d returned %X\n", context->cycles, value);
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	6087 return value;
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	6088 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	6089
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	6090 uint16_t vdp_data_port_read(vdp_context * context, uint32_t *cpu_cycle, uint32_t cpu_divider)
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	6091 {
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	6092 if (context->flags & FLAG_PENDING) {
2223 1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	6093 context->flags &= ~FLAG_PENDING;
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	6094 //Should these be cleared here?
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	6095 context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	6096 context->flags2 &= ~FLAG2_READ_PENDING;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	6097 }
138 aa3e1bb338c9 Fix VDP reads Mike Pavone <pavone@retrodev.com> parents: 137 diff changeset	6098 if (context->cd & 1) {
991 f9ee6f746cb4 Properly emulate machine freeze when reading from VDP while configured for writes Michael Pavone <pavone@retrodev.com> parents: 984 diff changeset	6099 warning("Read from VDP data port while writes are configured, CPU is now frozen. VDP Address: %X, CD: %X\n", context->address, context->cd);
1998 0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	6100 context->system->enter_debugger = 1;
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	6101 return context->prefetch;
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	6102 }
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	6103 switch (context->cd)
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	6104 {
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	6105 case VRAM_READ:
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	6106 case VSRAM_READ:
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	6107 case CRAM_READ:
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	6108 case VRAM_READ8:
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	6109 break;
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	6110 default:
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	6111 warning("Read from VDP data port with invalid source, CPU is now frozen. VDP Address: %X, CD: %X\n", context->address, context->cd);
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	6112 context->system->enter_debugger = 1;
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	6113 return context->prefetch;
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	6114 }
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	6115 uint32_t starting_cycle = context->cycles;
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	6116 while (!(context->flags & FLAG_READ_FETCHED)) {
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	6117 vdp_run_context_full(context, context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20));
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	6118 }
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	6119 context->flags &= ~FLAG_READ_FETCHED;
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	6120 //TODO: Make some logic analyzer captures to better characterize what's happening with read latency here
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	6121 if (context->cycles != starting_cycle) {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	6122 uint32_t delta = context->cycles - *cpu_cycle;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	6123 uint32_t cpu_delta = delta / cpu_divider;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	6124 if (delta % cpu_divider) {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	6125 cpu_delta++;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	6126 }
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	6127 cpu_cycle += cpu_delta cpu_divider;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	6128 if (*cpu_cycle - context->cycles < 2) {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	6129 context->read_latency = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*(READ_LATENCY - 1);
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	6130 } else {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	6131 context->read_latency = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*READ_LATENCY;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	6132 }
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	6133 } else {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	6134 context->read_latency = cpu_cycle + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)(READ_LATENCY - 1);
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	6135 }
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	6136 return context->prefetch;
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	6137 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	6138
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	6139 uint8_t vdp_data_port_read_pbc(vdp_context * context)
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	6140 {
2223 1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	6141 context->flags &= ~(FLAG_PENDING \| FLAG_READ_FETCHED);
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	6142 context->flags2 &= ~FLAG2_BYTE_PENDING;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	6143
1152 ddbb61be6119 Fix to pass a couple more tests in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1151 diff changeset	6144 context->cd = VRAM_READ8;
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	6145 return context->prefetch;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	6146 }
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	6147
65 aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame. Mike Pavone <pavone@retrodev.com> parents: 63 diff changeset	6148 void vdp_adjust_cycles(vdp_context * context, uint32_t deduction)
aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame. Mike Pavone <pavone@retrodev.com> parents: 63 diff changeset	6149 {
aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame. Mike Pavone <pavone@retrodev.com> parents: 63 diff changeset	6150 context->cycles -= deduction;
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	6151 if (context->pending_vint_start >= deduction) {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	6152 context->pending_vint_start -= deduction;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	6153 } else {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	6154 context->pending_vint_start = 0;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	6155 }
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	6156 if (context->pending_hint_start >= deduction) {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	6157 context->pending_hint_start -= deduction;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	6158 } else {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	6159 context->pending_hint_start = 0;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	6160 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	6161 if (context->fifo_read >= 0) {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	6162 int32_t idx = context->fifo_read;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	6163 do {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	6164 if (context->fifo[idx].cycle >= deduction) {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	6165 context->fifo[idx].cycle -= deduction;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	6166 } else {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	6167 context->fifo[idx].cycle = 0;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	6168 }
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	6169 idx = (idx+1) & (FIFO_SIZE-1);
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	6170 } while(idx != context->fifo_write);
65 aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame. Mike Pavone <pavone@retrodev.com> parents: 63 diff changeset	6171 }
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	6172 if (context->read_latency >= deduction) {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	6173 context->read_latency -= deduction;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	6174 } else {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	6175 context->read_latency = 0;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	6176 }
65 aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame. Mike Pavone <pavone@retrodev.com> parents: 63 diff changeset	6177 }
aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame. Mike Pavone <pavone@retrodev.com> parents: 63 diff changeset	6178
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	6179 static uint32_t vdp_cycles_hslot_wrap_h40(vdp_context * context)
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	6180 {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	6181 if (context->hslot < 183) {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	6182 return MCLKS_LINE - context->hslot * MCLKS_SLOT_H40;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	6183 } else if (context->hslot < HSYNC_END_H40) {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	6184 uint32_t before_hsync = context->hslot < HSYNC_SLOT_H40 ? (HSYNC_SLOT_H40 - context->hslot) * MCLKS_SLOT_H40 : 0;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	6185 uint32_t hsync = 0;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	6186 for (int i = context->hslot <= HSYNC_SLOT_H40 ? 0 : context->hslot - HSYNC_SLOT_H40; i < sizeof(h40_hsync_cycles)/sizeof(uint32_t); i++)
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	6187 {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	6188 hsync += h40_hsync_cycles[i];
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	6189 }
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	6190 uint32_t after_hsync = (256- HSYNC_END_H40) * MCLKS_SLOT_H40;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	6191 return before_hsync + hsync + after_hsync;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	6192 } else {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	6193 return (256-context->hslot) * MCLKS_SLOT_H40;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	6194 }
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	6195 }
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	6196
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	6197 static uint32_t vdp_cycles_next_line(vdp_context * context)
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6198 {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6199 if (context->regs[REG_MODE_4] & BIT_H40) {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6200 //TODO: Handle "illegal" Mode 4/H40 combo
647 5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	6201 if (context->hslot < LINE_CHANGE_H40) {
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 680 diff changeset	6202 return (LINE_CHANGE_H40 - context->hslot) * MCLKS_SLOT_H40;
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6203 } else {
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	6204 return vdp_cycles_hslot_wrap_h40(context) + LINE_CHANGE_H40 * MCLKS_SLOT_H40;
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6205 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6206 } else {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6207 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6208 if (context->hslot < LINE_CHANGE_H32) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6209 return (LINE_CHANGE_H32 - context->hslot) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6210 } else if (context->hslot < 148) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6211 return MCLKS_LINE - (context->hslot - LINE_CHANGE_H32) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6212 } else {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6213 return (256-context->hslot + LINE_CHANGE_H32) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6214 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6215 } else {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6216 if (context->hslot < 148) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6217 return (148 - context->hslot + LINE_CHANGE_MODE4 - 233) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6218 } else if (context->hslot < LINE_CHANGE_MODE4) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6219 return (LINE_CHANGE_MODE4 - context->hslot) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6220 } else {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6221 return MCLKS_LINE - (context->hslot - LINE_CHANGE_MODE4) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6222 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6223 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6224 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6225 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6226
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6227 static void get_jump_params(vdp_context context, uint32_t jump_start, uint32_t *jump_dst)
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6228 {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6229 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6230 if (context->flags2 & FLAG2_REGION_PAL) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6231 if (context->regs[REG_MODE_2] & BIT_PAL) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6232 *jump_start = 0x10B;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6233 *jump_dst = 0x1D2;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6234 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6235 *jump_start = 0x103;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6236 *jump_dst = 0x1CA;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6237 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6238 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6239 if (context->regs[REG_MODE_2] & BIT_PAL) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6240 *jump_start = 0x100;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6241 *jump_dst = 0x1FA;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6242 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6243 *jump_start = 0xEB;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6244 *jump_dst = 0x1E5;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6245 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6246 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6247 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6248 *jump_start = 0xDB;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6249 *jump_dst = 0x1D5;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6250 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6251 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6252
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	6253 static uint32_t vdp_cycles_to_line(vdp_context * context, uint32_t target)
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6254 {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6255 uint32_t jump_start, jump_dst;
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6256 get_jump_params(context, &jump_start, &jump_dst);
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6257 uint32_t lines;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6258 if (context->vcounter < target) {
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6259 if (target < jump_start \|\| context->vcounter > jump_start) {
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6260 lines = target - context->vcounter;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6261 } else {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6262 lines = jump_start - context->vcounter + target - jump_dst;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6263 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6264 } else {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6265 if (context->vcounter < jump_start) {
718 eaba6789f316 Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse. Michael Pavone <pavone@retrodev.com> parents: 717 diff changeset	6266 lines = jump_start - context->vcounter + 512 - jump_dst;
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6267 } else {
718 eaba6789f316 Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse. Michael Pavone <pavone@retrodev.com> parents: 717 diff changeset	6268 lines = 512 - context->vcounter;
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6269 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6270 if (target < jump_start) {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6271 lines += target;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6272 } else {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6273 lines += jump_start + target - jump_dst;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6274 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6275 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6276 return MCLKS_LINE * (lines - 1) + vdp_cycles_next_line(context);
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6277 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6278
680 4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 678 diff changeset	6279 uint32_t vdp_cycles_to_frame_end(vdp_context * context)
4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 678 diff changeset	6280 {
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	6281 return context->cycles + vdp_cycles_to_line(context, context->inactive_start);
680 4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 678 diff changeset	6282 }
4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 678 diff changeset	6283
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	6284 uint32_t vdp_next_hint(vdp_context * context)
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	6285 {
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	6286 if (!(context->regs[REG_MODE_1] & BIT_HINT_EN)) {
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	6287 return 0xFFFFFFFF;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	6288 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	6289 if (context->flags2 & FLAG2_HINT_PENDING) {
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	6290 return context->pending_hint_start;
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	6291 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6292 uint32_t hint_line;
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6293 if (context->state != ACTIVE) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6294 hint_line = context->regs[REG_HINT];
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6295 if (hint_line > context->inactive_start) {
724 2174f92c5f9b Fix bug in vdp_next_hint that was causing HINTs to fire repeatedly when they should not have fired at all based on an HINT interval that was larger than the number of active lines in the display Michael Pavone <pavone@retrodev.com> parents: 722 diff changeset	6296 return 0xFFFFFFFF;
2174f92c5f9b Fix bug in vdp_next_hint that was causing HINTs to fire repeatedly when they should not have fired at all based on an HINT interval that was larger than the number of active lines in the display Michael Pavone <pavone@retrodev.com> parents: 722 diff changeset	6297 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6298 } else {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6299 hint_line = context->vcounter + context->hint_counter + 1;
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6300 if (context->vcounter < context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6301 if (hint_line > context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6302 hint_line = context->regs[REG_HINT];
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6303 if (hint_line > context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6304 return 0xFFFFFFFF;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6305 }
1366 c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games Michael Pavone <pavone@retrodev.com> parents: 1365 diff changeset	6306 if (hint_line >= context->vcounter) {
c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games Michael Pavone <pavone@retrodev.com> parents: 1365 diff changeset	6307 //Next interrupt is for a line in the next frame that
c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games Michael Pavone <pavone@retrodev.com> parents: 1365 diff changeset	6308 //is higher than the line we're on now so just passing
c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games Michael Pavone <pavone@retrodev.com> parents: 1365 diff changeset	6309 //that line number to vdp_cycles_to_line will yield the wrong
c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games Michael Pavone <pavone@retrodev.com> parents: 1365 diff changeset	6310 //result
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	6311 return context->cycles + vdp_cycles_to_line(context, 0) + hint_line * MCLKS_LINE;
1366 c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games Michael Pavone <pavone@retrodev.com> parents: 1365 diff changeset	6312 }
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6313 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6314 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6315 uint32_t jump_start, jump_dst;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6316 get_jump_params(context, &jump_start, &jump_dst);
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6317 if (hint_line >= jump_start && context->vcounter < jump_dst) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6318 hint_line = (hint_line + jump_dst - jump_start) & 0x1FF;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6319 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6320 if (hint_line < context->vcounter && hint_line > context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6321 return 0xFFFFFFFF;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6322 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	6323 }
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	6324 }
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	6325 return context->cycles + vdp_cycles_to_line(context, hint_line);
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	6326 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	6327
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	6328 static uint32_t vdp_next_vint_real(vdp_context * context)
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	6329 {
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	6330 if (!(context->regs[REG_MODE_2] & BIT_VINT_EN)) {
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	6331 return 0xFFFFFFFF;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	6332 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	6333 if (context->flags2 & FLAG2_VINT_PENDING) {
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	6334 return context->pending_vint_start;
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	6335 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6336
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6337
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6338 return vdp_next_vint_z80(context);
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	6339 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	6340
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	6341 uint32_t vdp_next_vint(vdp_context *context)
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	6342 {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	6343 uint32_t ret = vdp_next_vint_real(context);
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	6344 #ifdef TIMING_DEBUG
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	6345 static uint32_t last = 0xFFFFFFFF;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	6346 if (last != ret) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	6347 printf("vdp_next_vint is %d at frame %d, line %d, hslot %d\n", ret, context->frame, context->vcounter, context->hslot);
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	6348 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	6349 last = ret;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	6350 #endif
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	6351 return ret;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	6352 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	6353
333 f16136a3835d Update Z80 vint timing Mike Pavone <pavone@retrodev.com> parents: 332 diff changeset	6354 uint32_t vdp_next_vint_z80(vdp_context * context)
f16136a3835d Update Z80 vint timing Mike Pavone <pavone@retrodev.com> parents: 332 diff changeset	6355 {
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	6356 uint16_t vint_line = (context->regs[REG_MODE_2] & BIT_MODE_5) ? context->inactive_start : context->inactive_start + 1;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	6357 if (context->vcounter == vint_line) {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6358 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6359 if (context->regs[REG_MODE_4] & BIT_H40) {
1175 0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	6360 if (context->hslot >= LINE_CHANGE_H40 \|\| context->hslot <= VINT_SLOT_H40) {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6361 uint32_t cycles = context->cycles;
1175 0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	6362 if (context->hslot >= LINE_CHANGE_H40) {
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	6363 if (context->hslot < 183) {
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	6364 cycles += (183 - context->hslot) * MCLKS_SLOT_H40;
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	6365 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	6366
1175 0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	6367 if (context->hslot < HSYNC_SLOT_H40) {
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	6368 cycles += (HSYNC_SLOT_H40 - (context->hslot >= 229 ? context->hslot : 229)) * MCLKS_SLOT_H40;
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	6369 }
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	6370 for (int slot = context->hslot <= HSYNC_SLOT_H40 ? HSYNC_SLOT_H40 : context->hslot; slot < HSYNC_END_H40; slot++ )
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	6371 {
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	6372 cycles += h40_hsync_cycles[slot - HSYNC_SLOT_H40];
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	6373 }
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	6374 cycles += (256 - (context->hslot > HSYNC_END_H40 ? context->hslot : HSYNC_END_H40)) * MCLKS_SLOT_H40;
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6375 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	6376
1175 0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	6377 cycles += (VINT_SLOT_H40 - (context->hslot >= LINE_CHANGE_H40 ? 0 : context->hslot)) * MCLKS_SLOT_H40;
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6378 return cycles;
995 2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	6379 }
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6380 } else {
1174 500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	6381 if (context->hslot >= LINE_CHANGE_H32 \|\| context->hslot <= VINT_SLOT_H32) {
500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	6382 if (context->hslot <= VINT_SLOT_H32) {
500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	6383 return context->cycles + (VINT_SLOT_H32 - context->hslot) * MCLKS_SLOT_H32;
500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	6384 } else if (context->hslot < 233) {
500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	6385 return context->cycles + (VINT_SLOT_H32 + 256 - 233 + 148 - context->hslot) * MCLKS_SLOT_H32;
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6386 } else {
1174 500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	6387 return context->cycles + (VINT_SLOT_H32 + 256 - context->hslot) * MCLKS_SLOT_H32;
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6388 }
995 2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	6389 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6390 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6391 } else {
1177 67e0462c30ce Fix line advancement in Mode 4 during inactive display. Fix a Mode 4 VInt timing discrepency Michael Pavone <pavone@retrodev.com> parents: 1175 diff changeset	6392 if (context->hslot >= LINE_CHANGE_MODE4) {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6393 return context->cycles + (VINT_SLOT_MODE4 + 256 - context->hslot) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6394 }
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6395 if (context->hslot <= VINT_SLOT_MODE4) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6396 return context->cycles + (VINT_SLOT_MODE4 - context->hslot) * MCLKS_SLOT_H32;
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6397 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6398 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6399 }
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	6400 int32_t cycles_to_vint = vdp_cycles_to_line(context, vint_line);
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6401 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6402 if (context->regs[REG_MODE_4] & BIT_H40) {
1175 0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	6403 cycles_to_vint += MCLKS_LINE - (LINE_CHANGE_H40 - VINT_SLOT_H40) * MCLKS_SLOT_H40;
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6404 } else {
1174 500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	6405 cycles_to_vint += (VINT_SLOT_H32 + 256 - 233 + 148 - LINE_CHANGE_H32) * MCLKS_SLOT_H32;
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6406 }
333 f16136a3835d Update Z80 vint timing Mike Pavone <pavone@retrodev.com> parents: 332 diff changeset	6407 } else {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6408 cycles_to_vint += (256 - LINE_CHANGE_MODE4 + VINT_SLOT_MODE4) * MCLKS_SLOT_H32;
333 f16136a3835d Update Z80 vint timing Mike Pavone <pavone@retrodev.com> parents: 332 diff changeset	6409 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	6410 return context->cycles + cycles_to_vint;
333 f16136a3835d Update Z80 vint timing Mike Pavone <pavone@retrodev.com> parents: 332 diff changeset	6411 }
f16136a3835d Update Z80 vint timing Mike Pavone <pavone@retrodev.com> parents: 332 diff changeset	6412
1377 e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	6413 uint32_t vdp_next_nmi(vdp_context *context)
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	6414 {
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	6415 if (!(context->flags2 & FLAG2_PAUSE)) {
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	6416 return 0xFFFFFFFF;
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	6417 }
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	6418 return context->cycles + vdp_cycles_to_line(context, 0x1FF);
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	6419 }
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	6420
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	6421 void vdp_pbc_pause(vdp_context *context)
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	6422 {
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	6423 context->flags2 \|= FLAG2_PAUSE;
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	6424 }
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	6425
953 08346262990b Remove the int number argument to vdp_int_ack since it is no longer used Michael Pavone <pavone@retrodev.com> parents: 952 diff changeset	6426 void vdp_int_ack(vdp_context * context)
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	6427 {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6428 //CPU interrupt acknowledge is only used in Mode 5
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6429 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6430 //Apparently the VDP interrupt controller is not very smart
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	6431 //Instead of paying attention to what interrupt is being acknowledged it just
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6432 //clears the pending flag for whatever interrupt it is currently asserted
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6433 //which may be different from the interrupt it was asserting when the 68k
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6434 //started the interrupt process. The window for this is narrow and depends
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6435 //on the latency between the int enable register write and the interrupt being
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6436 //asserted, but Fatal Rewind depends on this due to some buggy code
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6437 if ((context->flags2 & FLAG2_VINT_PENDING) && (context->regs[REG_MODE_2] & BIT_VINT_EN)) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6438 context->flags2 &= ~FLAG2_VINT_PENDING;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6439 } else if((context->flags2 & FLAG2_HINT_PENDING) && (context->regs[REG_MODE_1] & BIT_HINT_EN)) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6440 context->flags2 &= ~FLAG2_HINT_PENDING;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	6441 }
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	6442 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	6443 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	6444
2675 dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	6445 #define VDP_STATE_VERSION 5
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6446 void vdp_serialize(vdp_context context, serialize_buffer buf)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6447 {
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6448 save_int8(buf, VDP_STATE_VERSION);
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6449 save_int8(buf, VRAM_SIZE / 1024);//VRAM size in KB, needed for future proofing
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6450 save_buffer8(buf, context->vdpmem, VRAM_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6451 save_buffer16(buf, context->cram, CRAM_SIZE);
1906 2d462aa78349 Make VDP VSRAM capacity respect model selection Michael Pavone <pavone@retrodev.com> parents: 1899 diff changeset	6452 save_buffer16(buf, context->vsram, MAX_VSRAM_SIZE);
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6453 save_buffer8(buf, context->sat_cache, SAT_CACHE_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6454 for (int i = 0; i <= REG_DMASRC_H; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6455 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6456 save_int8(buf, context->regs[i]);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6457 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6458 save_int32(buf, context->address);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6459 save_int32(buf, context->serial_address);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6460 save_int8(buf, context->cd);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6461 uint8_t fifo_size;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6462 if (context->fifo_read < 0) {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6463 fifo_size = 0;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6464 } else if (context->fifo_write > context->fifo_read) {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6465 fifo_size = context->fifo_write - context->fifo_read;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6466 } else {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6467 fifo_size = context->fifo_write + FIFO_SIZE - context->fifo_read;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6468 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6469 save_int8(buf, fifo_size);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6470 for (int i = 0, cur = context->fifo_read; i < fifo_size; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6471 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6472 fifo_entry *entry = context->fifo + cur;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6473 cur = (cur + 1) & (FIFO_SIZE - 1);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6474 save_int32(buf, entry->cycle);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6475 save_int32(buf, entry->address);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6476 save_int16(buf, entry->value);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6477 save_int8(buf, entry->cd);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6478 save_int8(buf, entry->partial);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6479 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6480 //FIXME: Flag bits should be rearranged for maximum correspondence to status reg
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6481 save_int16(buf, context->flags2 << 8 \| context->flags);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6482 save_int32(buf, context->frame);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6483 save_int16(buf, context->vcounter);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6484 save_int8(buf, context->hslot);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6485 save_int16(buf, context->hv_latch);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6486 save_int8(buf, context->state);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6487 save_int16(buf, context->hscroll_a);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6488 save_int16(buf, context->hscroll_b);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6489 save_int16(buf, context->vscroll_latch[0]);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6490 save_int16(buf, context->vscroll_latch[1]);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6491 save_int16(buf, context->col_1);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6492 save_int16(buf, context->col_2);
2675 dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	6493 save_int16(buf, context->test_regs[0]);
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6494 save_buffer8(buf, context->tmp_buf_a, SCROLL_BUFFER_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6495 save_buffer8(buf, context->tmp_buf_b, SCROLL_BUFFER_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6496 save_int8(buf, context->buf_a_off);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6497 save_int8(buf, context->buf_b_off);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6498 //FIXME: Sprite rendering state is currently a mess
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6499 save_int8(buf, context->sprite_index);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6500 save_int8(buf, context->sprite_draws);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6501 save_int8(buf, context->slot_counter);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6502 save_int8(buf, context->cur_slot);
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6503 for (int i = 0; i < MAX_SPRITES_LINE; i++)
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6504 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6505 sprite_draw *draw = context->sprite_draw_list + i;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6506 save_int16(buf, draw->address);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6507 save_int16(buf, draw->x_pos);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6508 save_int8(buf, draw->pal_priority);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6509 save_int8(buf, draw->h_flip);
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6510 save_int8(buf, draw->width);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6511 save_int8(buf, draw->height);
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6512 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6513 for (int i = 0; i < MAX_SPRITES_LINE; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6514 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6515 sprite_info *info = context->sprite_info_list + i;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6516 save_int8(buf, info->size);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6517 save_int8(buf, info->index);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6518 save_int16(buf, info->y);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6519 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6520 save_buffer8(buf, context->linebuf, LINEBUF_SIZE);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	6521
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6522 save_int32(buf, context->cycles);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6523 save_int32(buf, context->pending_vint_start);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6524 save_int32(buf, context->pending_hint_start);
1925 039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes Michael Pavone <pavone@retrodev.com> parents: 1917 diff changeset	6525 save_int32(buf, context->address_latch);
2223 1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	6526 //was cd_latch, for compatibility with older builds that expect it
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	6527 save_int8(buf, context->cd);
2557 75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker Michael Pavone <pavone@retrodev.com> parents: 2513 diff changeset	6528 save_int8(buf, context->window_h_latch);
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker Michael Pavone <pavone@retrodev.com> parents: 2513 diff changeset	6529 save_int8(buf, context->window_v_latch);
2675 dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	6530 save_buffer16(buf, context->test_regs + 1, 7);
dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	6531 save_int8(buf, context->selected_test_reg);
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6532 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6533
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6534 void vdp_deserialize(deserialize_buffer buf, void vcontext)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6535 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6536 vdp_context *context = vcontext;
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6537 uint8_t version = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6538 uint8_t vramk;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6539 if (version == 64) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6540 vramk = version;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6541 version = 0;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6542 } else {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6543 vramk = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6544 }
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6545 if (version > VDP_STATE_VERSION) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6546 warning("Save state has VDP version %d, but this build only understands versions %d and lower", version, VDP_STATE_VERSION);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6547 }
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6548 load_buffer8(buf, context->vdpmem, (vramk * 1024) <= VRAM_SIZE ? vramk * 1024 : VRAM_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6549 if ((vramk * 1024) > VRAM_SIZE) {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6550 buf->cur_pos += (vramk * 1024) - VRAM_SIZE;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6551 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6552 load_buffer16(buf, context->cram, CRAM_SIZE);
1431 030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	6553 for (int i = 0; i < CRAM_SIZE; i++)
030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	6554 {
030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	6555 update_color_map(context, i, context->cram[i]);
030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	6556 }
1906 2d462aa78349 Make VDP VSRAM capacity respect model selection Michael Pavone <pavone@retrodev.com> parents: 1899 diff changeset	6557 load_buffer16(buf, context->vsram, version > 1 ? MAX_VSRAM_SIZE : MIN_VSRAM_SIZE);
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6558 load_buffer8(buf, context->sat_cache, SAT_CACHE_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6559 for (int i = 0; i <= REG_DMASRC_H; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6560 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6561 context->regs[i] = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6562 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6563 context->address = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6564 context->serial_address = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6565 context->cd = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6566 uint8_t fifo_size = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6567 if (fifo_size > FIFO_SIZE) {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6568 fatal_error("Invalid fifo size %d", fifo_size);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6569 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6570 if (fifo_size) {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6571 context->fifo_read = 0;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6572 context->fifo_write = fifo_size & (FIFO_SIZE - 1);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6573 for (int i = 0; i < fifo_size; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6574 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6575 fifo_entry *entry = context->fifo + i;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6576 entry->cycle = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6577 entry->address = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6578 entry->value = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6579 entry->cd = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6580 entry->partial = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6581 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6582 } else {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6583 context->fifo_read = -1;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6584 context->fifo_write = 0;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6585 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6586 uint16_t flags = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6587 context->flags2 = flags >> 8;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6588 context->flags = flags;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6589 context->frame = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6590 context->vcounter = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6591 context->hslot = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6592 context->hv_latch = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6593 context->state = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6594 context->hscroll_a = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6595 context->hscroll_b = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6596 context->vscroll_latch[0] = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6597 context->vscroll_latch[1] = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6598 context->col_1 = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6599 context->col_2 = load_int16(buf);
2675 dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	6600 context->test_regs[0] = load_int16(buf);
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6601 load_buffer8(buf, context->tmp_buf_a, SCROLL_BUFFER_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6602 load_buffer8(buf, context->tmp_buf_b, SCROLL_BUFFER_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6603 context->buf_a_off = load_int8(buf) & SCROLL_BUFFER_MASK;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6604 context->buf_b_off = load_int8(buf) & SCROLL_BUFFER_MASK;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6605 context->sprite_index = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6606 context->sprite_draws = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6607 context->slot_counter = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6608 context->cur_slot = load_int8(buf);
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6609 if (version == 0) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6610 int cur_draw = 0;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6611 for (int i = 0; i < MAX_SPRITES_LINE * 2; i++)
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6612 {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6613 if (cur_draw < MAX_SPRITES_LINE) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6614 sprite_draw *last = cur_draw ? context->sprite_draw_list + cur_draw - 1 : NULL;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6615 sprite_draw *draw = context->sprite_draw_list + cur_draw++;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6616 draw->address = load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6617 draw->x_pos = load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6618 draw->pal_priority = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6619 draw->h_flip = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6620 draw->width = 1;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6621 draw->height = 8;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	6622
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6623 if (last && last->width < 4 && last->h_flip == draw->h_flip && last->pal_priority == draw->pal_priority) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6624 int adjust_x = draw->x_pos + draw->h_flip ? -8 : 8;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6625 int height = draw->address - last->address /4;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6626 if (last->x_pos == adjust_x && (
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	6627 (last->width > 1 && height == last->height) \|\|
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6628 (last->width == 1 && (height == 8 \|\| height == 16 \|\| height == 24 \|\| height == 32))
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6629 )) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6630 //current draw appears to be part of the same sprite as the last one, combine it
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6631 cur_draw--;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6632 last->width++;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6633 }
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6634 }
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6635 } else {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6636 load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6637 load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6638 load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6639 load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6640 }
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6641 }
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6642 } else {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6643 for (int i = 0; i < MAX_SPRITES_LINE; i++)
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6644 {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6645 sprite_draw *draw = context->sprite_draw_list + i;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6646 draw->address = load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6647 draw->x_pos = load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6648 draw->pal_priority = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6649 draw->h_flip = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6650 draw->width = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6651 draw->height = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	6652 }
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6653 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6654 for (int i = 0; i < MAX_SPRITES_LINE; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6655 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6656 sprite_info *info = context->sprite_info_list + i;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6657 info->size = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6658 info->index = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6659 info->y = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6660 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6661 load_buffer8(buf, context->linebuf, LINEBUF_SIZE);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	6662
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6663 context->cycles = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6664 context->pending_vint_start = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6665 context->pending_hint_start = load_int32(buf);
2557 75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker Michael Pavone <pavone@retrodev.com> parents: 2513 diff changeset	6666 context->window_h_latch = context->regs[REG_WINDOW_H];
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker Michael Pavone <pavone@retrodev.com> parents: 2513 diff changeset	6667 context->window_v_latch = context->regs[REG_WINDOW_V];
1925 039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes Michael Pavone <pavone@retrodev.com> parents: 1917 diff changeset	6668 if (version > 2) {
039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes Michael Pavone <pavone@retrodev.com> parents: 1917 diff changeset	6669 context->address_latch = load_int32(buf);
2223 1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	6670 //was cd_latch, no longer used
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	6671 load_int8(buf);
2557 75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker Michael Pavone <pavone@retrodev.com> parents: 2513 diff changeset	6672 if (version > 3) {
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker Michael Pavone <pavone@retrodev.com> parents: 2513 diff changeset	6673 context->window_h_latch = load_int8(buf);
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker Michael Pavone <pavone@retrodev.com> parents: 2513 diff changeset	6674 context->window_v_latch = load_int8(buf);
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker Michael Pavone <pavone@retrodev.com> parents: 2513 diff changeset	6675 }
1925 039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes Michael Pavone <pavone@retrodev.com> parents: 1917 diff changeset	6676 } else {
039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes Michael Pavone <pavone@retrodev.com> parents: 1917 diff changeset	6677 context->address_latch = context->address;
039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes Michael Pavone <pavone@retrodev.com> parents: 1917 diff changeset	6678 }
2675 dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	6679 if (version > 4) {
dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	6680 load_buffer16(buf, context->test_regs + 1, 7);
dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	6681 context->selected_test_reg = load_int8(buf);
dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	6682 } else {
dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	6683 memset(context->test_regs + 1, 0, 7 * sizeof(uint16_t));
dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	6684 context->selected_test_reg = 0;
dbff641a33df Implement Z80/PSG clock speed test register bit Michael Pavone <pavone@retrodev.com> parents: 2612 diff changeset	6685 }
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6686 update_video_params(context);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	6687 }
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6688
1649 b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	6689 static vdp_context *current_vdp;
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	6690 static void vdp_debug_window_close(uint8_t which)
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	6691 {
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	6692 //TODO: remove need for current_vdp global, and find the VDP via current_system instead
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	6693 for (int i = 0; i < NUM_DEBUG_TYPES; i++)
1649 b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	6694 {
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	6695 if (current_vdp->enabled_debuggers & (1 << i) && which == current_vdp->debug_fb_indices[i]) {
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	6696 vdp_toggle_debug_view(current_vdp, i);
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	6697 break;
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	6698 }
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	6699 }
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	6700 }
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	6701
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6702 void vdp_toggle_debug_view(vdp_context *context, uint8_t debug_type)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6703 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6704 if (context->enabled_debuggers & 1 << debug_type) {
1642 c6b2c0f8cc61 Implemented support for toggling off a debug view Michael Pavone <pavone@retrodev.com> parents: 1641 diff changeset	6705 render_destroy_window(context->debug_fb_indices[debug_type]);
c6b2c0f8cc61 Implemented support for toggling off a debug view Michael Pavone <pavone@retrodev.com> parents: 1641 diff changeset	6706 context->enabled_debuggers &= ~(1 << debug_type);
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6707 } else {
1634 e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	6708 uint32_t width,height;
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	6709 uint8_t fetch_immediately = 0;
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6710 char *caption;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6711 switch(debug_type)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6712 {
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	6713 case DEBUG_PLANE:
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6714 caption = "BlastEm - VDP Plane Debugger";
2579 bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	6715 if (context->type == VDP_GENESIS) {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	6716 width = height = 1024;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	6717 } else {
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	6718 width = height = 512;
bd8d1babbfb5 Implement background plane debug view for Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2575 diff changeset	6719 }
1634 e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	6720 break;
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	6721 case DEBUG_VRAM:
1634 e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	6722 caption = "BlastEm - VDP VRAM Debugger";
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	6723 width = 1024;
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	6724 height = 512;
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6725 break;
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	6726 case DEBUG_CRAM:
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	6727 caption = "BlastEm - VDP CRAM Debugger";
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	6728 width = 512;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	6729 height = 512;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	6730 fetch_immediately = 1;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	6731 break;
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	6732 case DEBUG_COMPOSITE:
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	6733 caption = "BlastEm - VDP Plane Composition Debugger";
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	6734 width = LINEBUF_SIZE;
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	6735 height = context->inactive_start + context->border_top + context->border_bot;
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	6736 fetch_immediately = 1;
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	6737 break;
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6738 default:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6739 return;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6740 }
1649 b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	6741 current_vdp = context;
2693 46dba737b931 WIP Nuklear UI in VDP debug windows Michael Pavone <pavone@retrodev.com> parents: 2686 diff changeset	6742 #ifdef DISABLE_NUKLEAR
1649 b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	6743 context->debug_fb_indices[debug_type] = render_create_window(caption, width, height, vdp_debug_window_close);
2693 46dba737b931 WIP Nuklear UI in VDP debug windows Michael Pavone <pavone@retrodev.com> parents: 2686 diff changeset	6744 #else
46dba737b931 WIP Nuklear UI in VDP debug windows Michael Pavone <pavone@retrodev.com> parents: 2686 diff changeset	6745 context->debug_fb_indices[debug_type] = debug_create_window(debug_type, caption, width, height, vdp_debug_window_close);
46dba737b931 WIP Nuklear UI in VDP debug windows Michael Pavone <pavone@retrodev.com> parents: 2686 diff changeset	6746 #endif
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6747 if (context->debug_fb_indices[debug_type]) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6748 context->enabled_debuggers \|= 1 << debug_type;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6749 }
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	6750 if (fetch_immediately) {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	6751 context->debug_fbs[debug_type] = render_get_framebuffer(context->debug_fb_indices[debug_type], &context->debug_fb_pitch[debug_type]);
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	6752 }
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6753 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6754 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6755
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6756 void vdp_inc_debug_mode(vdp_context *context)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6757 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6758 uint8_t active = render_get_active_framebuffer();
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6759 if (active < FRAMEBUFFER_USER_START) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6760 return;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6761 }
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	6762 for (int i = 0; i < NUM_DEBUG_TYPES; i++)
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6763 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6764 if (context->enabled_debuggers & (1 << i) && context->debug_fb_indices[i] == active) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6765 context->debug_modes[i]++;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6766 return;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6767 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6768 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	6769 }
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6770
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6771 void vdp_replay_event(vdp_context context, uint8_t event, event_reader reader)
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6772 {
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6773 uint32_t address;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6774 deserialize_buffer *buffer = &reader->buffer;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6775 switch (event)
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6776 {
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6777 case EVENT_VRAM_BYTE:
1957 ba06346611a1 Fix some netplay issues Mike Pavone <pavone@retrodev.com> parents: 1956 diff changeset	6778 reader_ensure_data(reader, 3);
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6779 address = load_int16(buffer);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6780 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6781 case EVENT_VRAM_BYTE_DELTA:
1957 ba06346611a1 Fix some netplay issues Mike Pavone <pavone@retrodev.com> parents: 1956 diff changeset	6782 reader_ensure_data(reader, 2);
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6783 address = reader->last_byte_address + load_int8(buffer);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6784 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6785 case EVENT_VRAM_BYTE_ONE:
1957 ba06346611a1 Fix some netplay issues Mike Pavone <pavone@retrodev.com> parents: 1956 diff changeset	6786 reader_ensure_data(reader, 1);
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6787 address = reader->last_byte_address + 1;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6788 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6789 case EVENT_VRAM_BYTE_AUTO:
1957 ba06346611a1 Fix some netplay issues Mike Pavone <pavone@retrodev.com> parents: 1956 diff changeset	6790 reader_ensure_data(reader, 1);
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6791 address = reader->last_byte_address + context->regs[REG_AUTOINC];
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6792 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6793 case EVENT_VRAM_WORD:
1957 ba06346611a1 Fix some netplay issues Mike Pavone <pavone@retrodev.com> parents: 1956 diff changeset	6794 reader_ensure_data(reader, 4);
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6795 address = load_int8(buffer) << 16;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6796 address \|= load_int16(buffer);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6797 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6798 case EVENT_VRAM_WORD_DELTA:
1957 ba06346611a1 Fix some netplay issues Mike Pavone <pavone@retrodev.com> parents: 1956 diff changeset	6799 reader_ensure_data(reader, 3);
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6800 address = reader->last_word_address + load_int8(buffer);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6801 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6802 case EVENT_VDP_REG:
1956 275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	6803 case EVENT_VDP_INTRAM:
1957 ba06346611a1 Fix some netplay issues Mike Pavone <pavone@retrodev.com> parents: 1956 diff changeset	6804 reader_ensure_data(reader, event == EVENT_VDP_REG ? 2 : 3);
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6805 address = load_int8(buffer);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6806 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6807 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	6808
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6809 switch (event)
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6810 {
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6811 case EVENT_VDP_REG: {
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6812 uint8_t value = load_int8(buffer);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6813 context->regs[address] = value;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6814 if (address == REG_MODE_4) {
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6815 context->double_res = (value & (BIT_INTERLACE \| BIT_DOUBLE_RES)) == (BIT_INTERLACE \| BIT_DOUBLE_RES);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6816 if (!context->double_res) {
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6817 context->flags2 &= ~FLAG2_EVEN_FIELD;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6818 }
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6819 }
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6820 if (address == REG_MODE_1 \|\| address == REG_MODE_2 \|\| address == REG_MODE_4) {
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6821 update_video_params(context);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6822 }
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6823 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6824 }
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6825 case EVENT_VRAM_BYTE:
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6826 case EVENT_VRAM_BYTE_DELTA:
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6827 case EVENT_VRAM_BYTE_ONE:
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6828 case EVENT_VRAM_BYTE_AUTO: {
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6829 uint8_t byte = load_int8(buffer);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6830 reader->last_byte_address = address;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6831 vdp_check_update_sat_byte(context, address ^ 1, byte);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6832 write_vram_byte(context, address ^ 1, byte);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6833 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6834 }
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6835 case EVENT_VRAM_WORD:
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6836 case EVENT_VRAM_WORD_DELTA: {
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6837 uint16_t value = load_int16(buffer);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6838 reader->last_word_address = address;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6839 vdp_check_update_sat(context, address, value);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6840 write_vram_word(context, address, value);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6841 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6842 }
1956 275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	6843 case EVENT_VDP_INTRAM:
275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	6844 if (address < 128) {
275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	6845 write_cram(context, address, load_int16(buffer));
275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	6846 } else {
275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	6847 context->vsram[address&63] = load_int16(buffer);
275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	6848 }
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6849 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6850 }
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	6851 }

Mercurial > repos > blastem

annotate vdp.c @ 2700:1cfd000dc750 default tip